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[Targets] Migrate from atomic_load_8/16/32/64 to atomic_load_nonext_8/16/32/64. NFC

backend:AArch64

backend:AMDGPU

backend:ARM

backend:Hexagon

backend:loongarch

backend:PowerPC

backend:RISC-V

backend:Sparc

backend:WebAssembly

backend:X86

Status: Open (in progress).

llvm/llvm-projectnumber 137428

#137428 In llvm/llvm-project;

· topperc opened on Apr 26, 2025

[RISCV] Add scheduler definitions for SpacemiT-X60

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 137343

#137343 In llvm/llvm-project;

· mikhailramalho opened on Apr 25, 2025

[RISCV] Select (add x, C) -> (sub x, -C) if -C cheaper to materialize

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 137309

#137309 In llvm/llvm-project;

· pfusik opened on Apr 25, 2025

[DAG] Add utilities for inserting and extracting low sub-vectors [nfc]

backend:RISC-V

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Open (in progress).

llvm/llvm-projectnumber 137230

#137230 In llvm/llvm-project;

· preames opened on Apr 24, 2025

[RISCV] Use ri.vunzip2{a,b} for e64 fixed length deinterleave(2) shuffles

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 137217

#137217 In llvm/llvm-project;

· preames opened on Apr 24, 2025

[RISCV] Expand constant multiplication for targets without M extension

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 137195

#137195 In llvm/llvm-project;

· el-ev opened on Apr 24, 2025

[RISCV] Remove<code>riscv.segN.load/store</code> in favor of their mask variants

backend:RISC-V

llvm:ir

llvm:transforms

Status: Open (in progress).

llvm/llvm-projectnumber 137045

#137045 In llvm/llvm-project;

· mshockwave opened on Apr 23, 2025

[RISCV] Initial codegen support for zvqdotq extension

backend:RISC-V

Status: Open (in progress).

llvm/llvm-projectnumber 137039

#137039 In llvm/llvm-project;

· preames opened on Apr 23, 2025

inefficient rv32i multiply by 10 ?

backend:RISC-V

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

missed-optimization

Status: Open.

#137023 In llvm/llvm-project;

· alex-s168 opened on Apr 23, 2025

[RISCV] Allow <code>Zicsr</code>/<code>Zifencei</code> to duplicate with <code>g</code>

backend:RISC-V

clangClang issues not falling into any other categoryClang issues not falling into any other category

Status: Open (in progress).

llvm/llvm-projectnumber 136842

#136842 In llvm/llvm-project;

· wangpc-pp opened on Apr 23, 2025

 ·  

LLVM 20.X Release

[RISCV] error: duplicated standard user-level extension 'zifencei' since LLVM 19

backend:RISC-V

Status: Open.

Bug

#136803 In llvm/llvm-project;

· wangpc-pp opened on Apr 23, 2025

 ·  

LLVM 19.X Release

[DAGCombiner][RISCV] Add target hook to decide hoisting LogicOp with extension

backend:RISC-V

llvm:SelectionDAGSelectionDAGISel as wellSelectionDAGISel as well

Status: Open (in progress).

llvm/llvm-projectnumber 136677

#136677 In llvm/llvm-project;

· tclin914 opened on Apr 22, 2025