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[X86][CodeGen] Add a dag pattern to fix #64323
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After recent patch D30189, #64323's error message become a new one.
When DAGCombiner was optimizing `(vextract (scalar_to_vector val, 0) -> val`, it didn't
consider the possibility that the inserted value type has less bit than the dest type.
This patch fixes that.

Reviewed By: pengfei

Differential Revision: https://reviews.llvm.org/D158355
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DataCorrupted committed Aug 23, 2023
1 parent 7dc6566 commit f58fbfc
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Showing 2 changed files with 26 additions and 6 deletions.
13 changes: 7 additions & 6 deletions llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -21705,14 +21705,15 @@ SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
if (DAG.isKnownNeverZero(Index))
return DAG.getUNDEF(ScalarVT);

// Check if the result type doesn't match the inserted element type. A
// SCALAR_TO_VECTOR may truncate the inserted element and the
// EXTRACT_VECTOR_ELT may widen the extracted vector.
// Check if the result type doesn't match the inserted element type.
// The inserted element and extracted element may have mismatched bitwidth.
// As a result, EXTRACT_VECTOR_ELT may extend or truncate the extracted vector.
SDValue InOp = VecOp.getOperand(0);
if (InOp.getValueType() != ScalarVT) {
assert(InOp.getValueType().isInteger() && ScalarVT.isInteger() &&
InOp.getValueType().bitsGT(ScalarVT));
return DAG.getNode(ISD::TRUNCATE, DL, ScalarVT, InOp);
assert(InOp.getValueType().isInteger() && ScalarVT.isInteger());
if (InOp.getValueType().bitsGT(ScalarVT))
return DAG.getNode(ISD::TRUNCATE, DL, ScalarVT, InOp);
return DAG.getNode(ISD::ANY_EXTEND, DL, ScalarVT, InOp);
}
return InOp;
}
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19 changes: 19 additions & 0 deletions llvm/test/CodeGen/X86/pr64323.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,19 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2

; RUN: llc < %s -mtriple=x86_64 -mcpu=icelake-server | FileCheck %s

define <1 x i1> @f(<1 x float> %0) nounwind {
; CHECK-LABEL: f:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: vcmpeqss {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %k0
; CHECK-NEXT: kmovd %k0, %edi
; CHECK-NEXT: callq g@PLT
; CHECK-NEXT: popq %rcx
; CHECK-NEXT: retq
%A = fcmp oeq <1 x float> %0, <float 0x36A0000000000000>
%B = call <1 x i1> @g(<1 x i1> %A)
ret <1 x i1> %B
}

declare <1 x i1> @g(<1 x i1> %0) nounwind

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