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CarolineConcattoCarolineConcatto
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[AArch64][SME]Update intrinsic interface for ld1/st1 (#65582)
The new ACLE PR#225[1] now combines the slice parameters for some builtins. Slice specifies the ZA slice number directly and needs to be explicity implemented by the "user" with the base register plus the immediate offset [1]https://github.com/ARM-software/acle/pull/225/files
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-178
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8 files changed

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‎clang/include/clang/Basic/arm_sme.td

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -20,29 +20,29 @@ include "arm_sve_sme_incl.td"
2020

2121
multiclass ZALoad<string n_suffix, string t, string i_prefix, list<ImmCheck> ch> {
2222
let TargetGuard = "sme" in {
23-
def NAME # _H : MInst<"svld1_hor_" # n_suffix, "vimiPQ", t,
23+
def NAME # _H : MInst<"svld1_hor_" # n_suffix, "vimPQ", t,
2424
[IsLoad, IsOverloadNone, IsStreaming, IsSharedZA],
2525
MemEltTyDefault, i_prefix # "_horiz", ch>;
2626

27-
def NAME # _H_VNUM : MInst<"svld1_hor_vnum_" # n_suffix, "vimiPQl", t,
27+
def NAME # _H_VNUM : MInst<"svld1_hor_vnum_" # n_suffix, "vimPQl", t,
2828
[IsLoad, IsOverloadNone, IsStreaming, IsSharedZA],
2929
MemEltTyDefault, i_prefix # "_horiz", ch>;
3030

31-
def NAME # _V : MInst<"svld1_ver_" # n_suffix, "vimiPQ", t,
31+
def NAME # _V : MInst<"svld1_ver_" # n_suffix, "vimPQ", t,
3232
[IsLoad, IsOverloadNone, IsStreaming, IsSharedZA],
3333
MemEltTyDefault, i_prefix # "_vert", ch>;
3434

35-
def NAME # _V_VNUM : MInst<"svld1_ver_vnum_" # n_suffix, "vimiPQl", t,
35+
def NAME # _V_VNUM : MInst<"svld1_ver_vnum_" # n_suffix, "vimPQl", t,
3636
[IsLoad, IsOverloadNone, IsStreaming, IsSharedZA],
3737
MemEltTyDefault, i_prefix # "_vert", ch>;
3838
}
3939
}
4040

41-
defm SVLD1_ZA8 : ZALoad<"za8", "c", "aarch64_sme_ld1b", [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_15>]>;
42-
defm SVLD1_ZA16 : ZALoad<"za16", "s", "aarch64_sme_ld1h", [ImmCheck<0, ImmCheck0_1>, ImmCheck<2, ImmCheck0_7>]>;
43-
defm SVLD1_ZA32 : ZALoad<"za32", "i", "aarch64_sme_ld1w", [ImmCheck<0, ImmCheck0_3>, ImmCheck<2, ImmCheck0_3>]>;
44-
defm SVLD1_ZA64 : ZALoad<"za64", "l", "aarch64_sme_ld1d", [ImmCheck<0, ImmCheck0_7>, ImmCheck<2, ImmCheck0_1>]>;
45-
defm SVLD1_ZA128 : ZALoad<"za128", "q", "aarch64_sme_ld1q", [ImmCheck<0, ImmCheck0_15>, ImmCheck<2, ImmCheck0_0>]>;
41+
defm SVLD1_ZA8 : ZALoad<"za8", "c", "aarch64_sme_ld1b", [ImmCheck<0, ImmCheck0_0>]>;
42+
defm SVLD1_ZA16 : ZALoad<"za16", "s", "aarch64_sme_ld1h", [ImmCheck<0, ImmCheck0_1>]>;
43+
defm SVLD1_ZA32 : ZALoad<"za32", "i", "aarch64_sme_ld1w", [ImmCheck<0, ImmCheck0_3>]>;
44+
defm SVLD1_ZA64 : ZALoad<"za64", "l", "aarch64_sme_ld1d", [ImmCheck<0, ImmCheck0_7>]>;
45+
defm SVLD1_ZA128 : ZALoad<"za128", "q", "aarch64_sme_ld1q", [ImmCheck<0, ImmCheck0_15>]>;
4646

4747
def SVLDR_VNUM_ZA : MInst<"svldr_vnum_za", "vmQi", "",
4848
[IsOverloadNone, IsStreamingCompatible, IsSharedZA],
@@ -58,29 +58,29 @@ def SVLDR_ZA : MInst<"svldr_za", "vmQ", "",
5858

5959
multiclass ZAStore<string n_suffix, string t, string i_prefix, list<ImmCheck> ch> {
6060
let TargetGuard = "sme" in {
61-
def NAME # _H : MInst<"svst1_hor_" # n_suffix, "vimiP%", t,
61+
def NAME # _H : MInst<"svst1_hor_" # n_suffix, "vimP%", t,
6262
[IsStore, IsOverloadNone, IsStreaming, IsSharedZA, IsPreservesZA],
6363
MemEltTyDefault, i_prefix # "_horiz", ch>;
6464

65-
def NAME # _H_VNUM : MInst<"svst1_hor_vnum_" # n_suffix, "vimiP%l", t,
65+
def NAME # _H_VNUM : MInst<"svst1_hor_vnum_" # n_suffix, "vimP%l", t,
6666
[IsStore, IsOverloadNone, IsStreaming, IsSharedZA, IsPreservesZA],
6767
MemEltTyDefault, i_prefix # "_horiz", ch>;
6868

69-
def NAME # _V : MInst<"svst1_ver_" # n_suffix, "vimiP%", t,
69+
def NAME # _V : MInst<"svst1_ver_" # n_suffix, "vimP%", t,
7070
[IsStore, IsOverloadNone, IsStreaming, IsSharedZA, IsPreservesZA],
7171
MemEltTyDefault, i_prefix # "_vert", ch>;
7272

73-
def NAME # _V_VNUM : MInst<"svst1_ver_vnum_" # n_suffix, "vimiP%l", t,
73+
def NAME # _V_VNUM : MInst<"svst1_ver_vnum_" # n_suffix, "vimP%l", t,
7474
[IsStore, IsOverloadNone, IsStreaming, IsSharedZA, IsPreservesZA],
7575
MemEltTyDefault, i_prefix # "_vert", ch>;
7676
}
7777
}
7878

79-
defm SVST1_ZA8 : ZAStore<"za8", "c", "aarch64_sme_st1b", [ImmCheck<0, ImmCheck0_0>, ImmCheck<2, ImmCheck0_15>]>;
80-
defm SVST1_ZA16 : ZAStore<"za16", "s", "aarch64_sme_st1h", [ImmCheck<0, ImmCheck0_1>, ImmCheck<2, ImmCheck0_7>]>;
81-
defm SVST1_ZA32 : ZAStore<"za32", "i", "aarch64_sme_st1w", [ImmCheck<0, ImmCheck0_3>, ImmCheck<2, ImmCheck0_3>]>;
82-
defm SVST1_ZA64 : ZAStore<"za64", "l", "aarch64_sme_st1d", [ImmCheck<0, ImmCheck0_7>, ImmCheck<2, ImmCheck0_1>]>;
83-
defm SVST1_ZA128 : ZAStore<"za128", "q", "aarch64_sme_st1q", [ImmCheck<0, ImmCheck0_15>, ImmCheck<2, ImmCheck0_0>]>;
79+
defm SVST1_ZA8 : ZAStore<"za8", "c", "aarch64_sme_st1b", [ImmCheck<0, ImmCheck0_0>]>;
80+
defm SVST1_ZA16 : ZAStore<"za16", "s", "aarch64_sme_st1h", [ImmCheck<0, ImmCheck0_1>]>;
81+
defm SVST1_ZA32 : ZAStore<"za32", "i", "aarch64_sme_st1w", [ImmCheck<0, ImmCheck0_3>]>;
82+
defm SVST1_ZA64 : ZAStore<"za64", "l", "aarch64_sme_st1d", [ImmCheck<0, ImmCheck0_7>]>;
83+
defm SVST1_ZA128 : ZAStore<"za128", "q", "aarch64_sme_st1q", [ImmCheck<0, ImmCheck0_15>]>;
8484

8585
def SVSTR_VNUM_ZA : MInst<"svstr_vnum_za", "vm%i", "",
8686
[IsOverloadNone, IsStreamingCompatible, IsSharedZA, IsPreservesZA],

‎clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -9585,29 +9585,29 @@ Value *CodeGenFunction::EmitTileslice(Value *Offset, Value *Base) {
95859585
Value *CodeGenFunction::EmitSMELd1St1(const SVETypeFlags &TypeFlags,
95869586
SmallVectorImpl<Value *> &Ops,
95879587
unsigned IntID) {
9588-
Ops[3] = EmitSVEPredicateCast(
9589-
Ops[3], getSVEVectorForElementType(SVEBuiltinMemEltTy(TypeFlags)));
9588+
Ops[2] = EmitSVEPredicateCast(
9589+
Ops[2], getSVEVectorForElementType(SVEBuiltinMemEltTy(TypeFlags)));
95909590

95919591
SmallVector<Value *> NewOps;
9592-
NewOps.push_back(Ops[3]);
9592+
NewOps.push_back(Ops[2]);
95939593

9594-
llvm::Value *BasePtr = Ops[4];
9594+
llvm::Value *BasePtr = Ops[3];
95959595

95969596
// If the intrinsic contains the vnum parameter, multiply it with the vector
95979597
// size in bytes.
9598-
if (Ops.size() == 6) {
9598+
if (Ops.size() == 5) {
95999599
Function *StreamingVectorLength =
96009600
CGM.getIntrinsic(Intrinsic::aarch64_sme_cntsb);
96019601
llvm::Value *StreamingVectorLengthCall =
96029602
Builder.CreateCall(StreamingVectorLength);
96039603
llvm::Value *Mulvl =
9604-
Builder.CreateMul(StreamingVectorLengthCall, Ops[5], "mulvl");
9604+
Builder.CreateMul(StreamingVectorLengthCall, Ops[4], "mulvl");
96059605
// The type of the ptr parameter is void *, so use Int8Ty here.
9606-
BasePtr = Builder.CreateGEP(Int8Ty, Ops[4], Mulvl);
9606+
BasePtr = Builder.CreateGEP(Int8Ty, Ops[3], Mulvl);
96079607
}
96089608
NewOps.push_back(BasePtr);
96099609
NewOps.push_back(Ops[0]);
9610-
NewOps.push_back(EmitTileslice(Ops[2], Ops[1]));
9610+
NewOps.push_back(Ops[1]);
96119611
Function *F = CGM.getIntrinsic(IntID);
96129612
return Builder.CreateCall(F, NewOps);
96139613
}

‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,8 @@
2020
// CHECK-NEXT: ret void
2121
//
2222
ARM_STREAMING_ATTR void test_svld1_hor_za8(uint32_t slice_base, svbool_t pg, const void *ptr) {
23-
svld1_hor_za8(0, slice_base, 0, pg, ptr);
24-
svld1_hor_za8(0, slice_base, 15, pg, ptr);
23+
svld1_hor_za8(0, slice_base, pg, ptr);
24+
svld1_hor_za8(0, slice_base + 15, pg, ptr);
2525
}
2626

2727
// CHECK-C-LABEL: @test_svld1_hor_za16(
@@ -34,8 +34,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_za8(uint32_t slice_base, svbool_t pg, con
3434
// CHECK-NEXT: ret void
3535
//
3636
ARM_STREAMING_ATTR void test_svld1_hor_za16(uint32_t slice_base, svbool_t pg, const void *ptr) {
37-
svld1_hor_za16(0, slice_base, 0, pg, ptr);
38-
svld1_hor_za16(1, slice_base, 7, pg, ptr);
37+
svld1_hor_za16(0, slice_base, pg, ptr);
38+
svld1_hor_za16(1, slice_base + 7, pg, ptr);
3939
}
4040

4141
// CHECK-C-LABEL: @test_svld1_hor_za32(
@@ -48,8 +48,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_za16(uint32_t slice_base, svbool_t pg, co
4848
// CHECK-NEXT: ret void
4949
//
5050
ARM_STREAMING_ATTR void test_svld1_hor_za32(uint32_t slice_base, svbool_t pg, const void *ptr) {
51-
svld1_hor_za32(0, slice_base, 0, pg, ptr);
52-
svld1_hor_za32(3, slice_base, 3, pg, ptr);
51+
svld1_hor_za32(0, slice_base, pg, ptr);
52+
svld1_hor_za32(3, slice_base + 3, pg, ptr);
5353
}
5454

5555
// CHECK-C-LABEL: @test_svld1_hor_za64(
@@ -62,8 +62,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_za32(uint32_t slice_base, svbool_t pg, co
6262
// CHECK-NEXT: ret void
6363
//
6464
ARM_STREAMING_ATTR void test_svld1_hor_za64(uint32_t slice_base, svbool_t pg, const void *ptr) {
65-
svld1_hor_za64(0, slice_base, 0, pg, ptr);
66-
svld1_hor_za64(7, slice_base, 1, pg, ptr);
65+
svld1_hor_za64(0, slice_base, pg, ptr);
66+
svld1_hor_za64(7, slice_base + 1, pg, ptr);
6767
}
6868

6969
// CHECK-C-LABEL: @test_svld1_hor_za128(
@@ -75,8 +75,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_za64(uint32_t slice_base, svbool_t pg, co
7575
// CHECK-NEXT: ret void
7676
//
7777
ARM_STREAMING_ATTR void test_svld1_hor_za128(uint32_t slice_base, svbool_t pg, const void *ptr) {
78-
svld1_hor_za128(0, slice_base, 0, pg, ptr);
79-
svld1_hor_za128(15, slice_base, 0, pg, ptr);
78+
svld1_hor_za128(0, slice_base, pg, ptr);
79+
svld1_hor_za128(15, slice_base, pg, ptr);
8080
}
8181

8282
// CHECK-C-LABEL: @test_svld1_ver_za8(
@@ -88,8 +88,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_za128(uint32_t slice_base, svbool_t pg, c
8888
// CHECK-NEXT: ret void
8989
//
9090
ARM_STREAMING_ATTR void test_svld1_ver_za8(uint32_t slice_base, svbool_t pg, const void *ptr) {
91-
svld1_ver_za8(0, slice_base, 0, pg, ptr);
92-
svld1_ver_za8(0, slice_base, 15, pg, ptr);
91+
svld1_ver_za8(0, slice_base, pg, ptr);
92+
svld1_ver_za8(0, slice_base + 15, pg, ptr);
9393
}
9494

9595
// CHECK-C-LABEL: @test_svld1_ver_za16(
@@ -102,8 +102,8 @@ ARM_STREAMING_ATTR void test_svld1_ver_za8(uint32_t slice_base, svbool_t pg, con
102102
// CHECK-NEXT: ret void
103103
//
104104
ARM_STREAMING_ATTR void test_svld1_ver_za16(uint32_t slice_base, svbool_t pg, const void *ptr) {
105-
svld1_ver_za16(0, slice_base, 0, pg, ptr);
106-
svld1_ver_za16(1, slice_base, 7, pg, ptr);
105+
svld1_ver_za16(0, slice_base, pg, ptr);
106+
svld1_ver_za16(1, slice_base + 7, pg, ptr);
107107
}
108108

109109
// CHECK-C-LABEL: @test_svld1_ver_za32(
@@ -116,8 +116,8 @@ ARM_STREAMING_ATTR void test_svld1_ver_za16(uint32_t slice_base, svbool_t pg, co
116116
// CHECK-NEXT: ret void
117117
//
118118
ARM_STREAMING_ATTR void test_svld1_ver_za32(uint32_t slice_base, svbool_t pg, const void *ptr) {
119-
svld1_ver_za32(0, slice_base, 0, pg, ptr);
120-
svld1_ver_za32(3, slice_base, 3, pg, ptr);
119+
svld1_ver_za32(0, slice_base, pg, ptr);
120+
svld1_ver_za32(3, slice_base + 3, pg, ptr);
121121
}
122122

123123
// CHECK-C-LABEL: @test_svld1_ver_za64(
@@ -130,8 +130,8 @@ ARM_STREAMING_ATTR void test_svld1_ver_za32(uint32_t slice_base, svbool_t pg, co
130130
// CHECK-NEXT: ret void
131131
//
132132
ARM_STREAMING_ATTR void test_svld1_ver_za64(uint32_t slice_base, svbool_t pg, const void *ptr) {
133-
svld1_ver_za64(0, slice_base, 0, pg, ptr);
134-
svld1_ver_za64(7, slice_base, 1, pg, ptr);
133+
svld1_ver_za64(0, slice_base, pg, ptr);
134+
svld1_ver_za64(7, slice_base + 1, pg, ptr);
135135
}
136136

137137
// CHECK-C-LABEL: @test_svld1_ver_za128(
@@ -143,6 +143,6 @@ ARM_STREAMING_ATTR void test_svld1_ver_za64(uint32_t slice_base, svbool_t pg, co
143143
// CHECK-NEXT: ret void
144144
//
145145
ARM_STREAMING_ATTR void test_svld1_ver_za128(uint32_t slice_base, svbool_t pg, const void *ptr) {
146-
svld1_ver_za128(0, slice_base, 0, pg, ptr);
147-
svld1_ver_za128(15, slice_base, 0, pg, ptr);
146+
svld1_ver_za128(0, slice_base, pg, ptr);
147+
svld1_ver_za128(15, slice_base, pg, ptr);
148148
}

‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c

Lines changed: 20 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -23,8 +23,8 @@
2323
// CHECK-NEXT: ret void
2424
//
2525
ARM_STREAMING_ATTR void test_svld1_hor_vnum_za8(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
26-
svld1_hor_vnum_za8(0, slice_base, 0, pg, ptr, vnum);
27-
svld1_hor_vnum_za8(0, slice_base, 15, pg, ptr, vnum);
26+
svld1_hor_vnum_za8(0, slice_base, pg, ptr, vnum);
27+
svld1_hor_vnum_za8(0, slice_base + 15, pg, ptr, vnum);
2828
}
2929

3030
// CHECK-C-LABEL: @test_svld1_hor_vnum_za16(
@@ -40,8 +40,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_vnum_za8(uint32_t slice_base, svbool_t pg
4040
// CHECK-NEXT: ret void
4141
//
4242
ARM_STREAMING_ATTR void test_svld1_hor_vnum_za16(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
43-
svld1_hor_vnum_za16(0, slice_base, 0, pg, ptr, vnum);
44-
svld1_hor_vnum_za16(1, slice_base, 7, pg, ptr, vnum);
43+
svld1_hor_vnum_za16(0, slice_base, pg, ptr, vnum);
44+
svld1_hor_vnum_za16(1, slice_base + 7, pg, ptr, vnum);
4545
}
4646

4747
// CHECK-C-LABEL: @test_svld1_hor_vnum_za32(
@@ -57,8 +57,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_vnum_za16(uint32_t slice_base, svbool_t p
5757
// CHECK-NEXT: ret void
5858
//
5959
ARM_STREAMING_ATTR void test_svld1_hor_vnum_za32(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
60-
svld1_hor_vnum_za32(0, slice_base, 0, pg, ptr, vnum);
61-
svld1_hor_vnum_za32(3, slice_base, 3, pg, ptr, vnum);
60+
svld1_hor_vnum_za32(0, slice_base, pg, ptr, vnum);
61+
svld1_hor_vnum_za32(3, slice_base + 3, pg, ptr, vnum);
6262
}
6363

6464
// CHECK-C-LABEL: @test_svld1_hor_vnum_za64(
@@ -74,8 +74,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_vnum_za32(uint32_t slice_base, svbool_t p
7474
// CHECK-NEXT: ret void
7575
//
7676
ARM_STREAMING_ATTR void test_svld1_hor_vnum_za64(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
77-
svld1_hor_vnum_za64(0, slice_base, 0, pg, ptr, vnum);
78-
svld1_hor_vnum_za64(7, slice_base, 1, pg, ptr, vnum);
77+
svld1_hor_vnum_za64(0, slice_base, pg, ptr, vnum);
78+
svld1_hor_vnum_za64(7, slice_base + 1, pg, ptr, vnum);
7979
}
8080

8181
// CHECK-C-LABEL: @test_svld1_hor_vnum_za128(
@@ -90,8 +90,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_vnum_za64(uint32_t slice_base, svbool_t p
9090
// CHECK-NEXT: ret void
9191
//
9292
ARM_STREAMING_ATTR void test_svld1_hor_vnum_za128(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
93-
svld1_hor_vnum_za128(0, slice_base, 0, pg, ptr, vnum);
94-
svld1_hor_vnum_za128(15, slice_base, 0, pg, ptr, vnum);
93+
svld1_hor_vnum_za128(0, slice_base, pg, ptr, vnum);
94+
svld1_hor_vnum_za128(15, slice_base, pg, ptr, vnum);
9595
}
9696

9797
// CHECK-C-LABEL: @test_svld1_ver_hor_za8(
@@ -106,8 +106,8 @@ ARM_STREAMING_ATTR void test_svld1_hor_vnum_za128(uint32_t slice_base, svbool_t
106106
// CHECK-NEXT: ret void
107107
//
108108
ARM_STREAMING_ATTR void test_svld1_ver_hor_za8(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
109-
svld1_ver_vnum_za8(0, slice_base, 0, pg, ptr, vnum);
110-
svld1_ver_vnum_za8(0, slice_base, 15, pg, ptr, vnum);
109+
svld1_ver_vnum_za8(0, slice_base, pg, ptr, vnum);
110+
svld1_ver_vnum_za8(0, slice_base + 15, pg, ptr, vnum);
111111
}
112112

113113
// CHECK-C-LABEL: @test_svld1_ver_vnum_za16(
@@ -123,8 +123,8 @@ ARM_STREAMING_ATTR void test_svld1_ver_hor_za8(uint32_t slice_base, svbool_t pg,
123123
// CHECK-NEXT: ret void
124124
//
125125
ARM_STREAMING_ATTR void test_svld1_ver_vnum_za16(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
126-
svld1_ver_vnum_za16(0, slice_base, 0, pg, ptr, vnum);
127-
svld1_ver_vnum_za16(1, slice_base, 7, pg, ptr, vnum);
126+
svld1_ver_vnum_za16(0, slice_base, pg, ptr, vnum);
127+
svld1_ver_vnum_za16(1, slice_base + 7, pg, ptr, vnum);
128128
}
129129

130130
// CHECK-C-LABEL: @test_svld1_ver_vnum_za32(
@@ -140,8 +140,8 @@ ARM_STREAMING_ATTR void test_svld1_ver_vnum_za16(uint32_t slice_base, svbool_t p
140140
// CHECK-NEXT: ret void
141141
//
142142
ARM_STREAMING_ATTR void test_svld1_ver_vnum_za32(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
143-
svld1_ver_vnum_za32(0, slice_base, 0, pg, ptr, vnum);
144-
svld1_ver_vnum_za32(3, slice_base, 3, pg, ptr, vnum);
143+
svld1_ver_vnum_za32(0, slice_base, pg, ptr, vnum);
144+
svld1_ver_vnum_za32(3, slice_base + 3, pg, ptr, vnum);
145145
}
146146

147147
// CHECK-C-LABEL: @test_svld1_ver_vnum_za64(
@@ -157,8 +157,8 @@ ARM_STREAMING_ATTR void test_svld1_ver_vnum_za32(uint32_t slice_base, svbool_t p
157157
// CHECK-NEXT: ret void
158158
//
159159
ARM_STREAMING_ATTR void test_svld1_ver_vnum_za64(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
160-
svld1_ver_vnum_za64(0, slice_base, 0, pg, ptr, vnum);
161-
svld1_ver_vnum_za64(7, slice_base, 1, pg, ptr, vnum);
160+
svld1_ver_vnum_za64(0, slice_base, pg, ptr, vnum);
161+
svld1_ver_vnum_za64(7, slice_base + 1, pg, ptr, vnum);
162162
}
163163

164164
// CHECK-C-LABEL: @test_svld1_ver_vnum_za128(
@@ -173,6 +173,6 @@ ARM_STREAMING_ATTR void test_svld1_ver_vnum_za64(uint32_t slice_base, svbool_t p
173173
// CHECK-NEXT: ret void
174174
//
175175
ARM_STREAMING_ATTR void test_svld1_ver_vnum_za128(uint32_t slice_base, svbool_t pg, const void *ptr, int64_t vnum) {
176-
svld1_ver_vnum_za128(0, slice_base, 0, pg, ptr, vnum);
177-
svld1_ver_vnum_za128(15, slice_base, 0, pg, ptr, vnum);
176+
svld1_ver_vnum_za128(0, slice_base, pg, ptr, vnum);
177+
svld1_ver_vnum_za128(15, slice_base, pg, ptr, vnum);
178178
}

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