| 
 | 1 | +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5  | 
 | 2 | +; RUN: llc -mtriple=amdgcn -mcpu=gfx942 -verify-machineinstrs < %s | FileCheck %s  | 
 | 3 | + | 
 | 4 | +define void @test_load_zext() {  | 
 | 5 | +; CHECK-LABEL: test_load_zext:  | 
 | 6 | +; CHECK:       ; %bb.0: ; %.entry  | 
 | 7 | +; CHECK-NEXT:    s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)  | 
 | 8 | +; CHECK-NEXT:    s_mov_b32 s0, s33  | 
 | 9 | +; CHECK-NEXT:    s_mov_b32 s33, s32  | 
 | 10 | +; CHECK-NEXT:    s_or_saveexec_b64 s[2:3], -1  | 
 | 11 | +; CHECK-NEXT:    scratch_store_dword off, v40, s33 ; 4-byte Folded Spill  | 
 | 12 | +; CHECK-NEXT:    s_mov_b64 exec, s[2:3]  | 
 | 13 | +; CHECK-NEXT:    s_add_i32 s32, s32, 16  | 
 | 14 | +; CHECK-NEXT:    v_writelane_b32 v40, s0, 2  | 
 | 15 | +; CHECK-NEXT:    s_getpc_b64 s[0:1]  | 
 | 16 | +; CHECK-NEXT:    s_add_u32 s0, s0, test_buffer_load_sgpr_plus_imm_offset_noflags@gotpcrel32@lo+4  | 
 | 17 | +; CHECK-NEXT:    s_addc_u32 s1, s1, test_buffer_load_sgpr_plus_imm_offset_noflags@gotpcrel32@hi+12  | 
 | 18 | +; CHECK-NEXT:    s_load_dwordx2 s[2:3], s[0:1], 0x0  | 
 | 19 | +; CHECK-NEXT:    v_writelane_b32 v40, s30, 0  | 
 | 20 | +; CHECK-NEXT:    s_mov_b32 s0, DescriptorBuffer@abs32@lo  | 
 | 21 | +; CHECK-NEXT:    v_writelane_b32 v40, s31, 1  | 
 | 22 | +; CHECK-NEXT:    s_waitcnt lgkmcnt(0)  | 
 | 23 | +; CHECK-NEXT:    s_swappc_b64 s[30:31], s[2:3]  | 
 | 24 | +; CHECK-NEXT:    v_readlane_b32 s31, v40, 1  | 
 | 25 | +; CHECK-NEXT:    v_readlane_b32 s30, v40, 0  | 
 | 26 | +; CHECK-NEXT:    s_mov_b32 s32, s33  | 
 | 27 | +; CHECK-NEXT:    v_readlane_b32 s0, v40, 2  | 
 | 28 | +; CHECK-NEXT:    s_or_saveexec_b64 s[2:3], -1  | 
 | 29 | +; CHECK-NEXT:    scratch_load_dword v40, off, s33 ; 4-byte Folded Reload  | 
 | 30 | +; CHECK-NEXT:    s_mov_b64 exec, s[2:3]  | 
 | 31 | +; CHECK-NEXT:    s_mov_b32 s33, s0  | 
 | 32 | +; CHECK-NEXT:    s_waitcnt vmcnt(0)  | 
 | 33 | +; CHECK-NEXT:    s_setpc_b64 s[30:31]  | 
 | 34 | +.entry:  | 
 | 35 | +  %0 = call i32 @llvm.amdgcn.reloc.constant(metadata !0)  | 
 | 36 | +  call void @test_buffer_load_sgpr_plus_imm_offset_noflags(i32 %0)  | 
 | 37 | +  ret void  | 
 | 38 | +}  | 
 | 39 | + | 
 | 40 | +declare void @test_buffer_load_sgpr_plus_imm_offset_noflags(i32 inreg)  | 
 | 41 | + | 
 | 42 | +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)  | 
 | 43 | +declare i32 @llvm.amdgcn.reloc.constant(metadata) #0  | 
 | 44 | + | 
 | 45 | +attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }  | 
 | 46 | + | 
 | 47 | +!0 = !{!"DescriptorBuffer", i32 4, i32 8, i32 0, i32 0}  | 
0 commit comments