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[mlir][ArmSME] Update tile slice layout syntax (#69151)
This patch prefixes tile slice layout with `layout` in the assemblyFormat: - `<vertical>` -> `layout<vertical>` - `<horizontal>` -> `layout<horizontal>` The reason for this change is the current format doesn't play nicely with additional optional operands, required to support padding and masking (#69148), as it becomes ambiguous. This affects the the following ops: - arm_sme.tile_load - arm_sme.tile_store - arm_sme.load_tile_slice - arm_sme.store_tile_slice
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8 files changed

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‎mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td‎

Lines changed: 17 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -76,6 +76,7 @@ def TileSliceLayout : I32EnumAttr<"TileSliceLayout", "Layout of a tile slice", [
7676
def ArmSME_TileSliceLayoutAttr : EnumAttr<ArmSME_Dialect, TileSliceLayout,
7777
"layout"> {
7878
let assemblyFormat = "`<` $value `>`";
79+
let defaultValue = "TileSliceLayout::Horizontal";
7980
}
8081

8182
//===----------------------------------------------------------------------===//
@@ -248,19 +249,18 @@ def TileLoadOp : ArmSME_Op<"tile_load"> {
248249

249250
Example 2: Load a FP 32-bit element ZA tile with vertical layout from memory.
250251
```mlir
251-
%tile = arm_sme.tile_load %base[%c0, %c0], <vertical> : memref<?x?xf32>, vector<[4]x[4]xf32>
252+
%tile = arm_sme.tile_load %base[%c0, %c0] layout<vertical> : memref<?x?xf32>, vector<[4]x[4]xf32>
252253
```
253254

254255
Example 3: Load a 128-bit element ZA tile with horizontal layout (default) from memory.
255256
```mlir
256-
%tile = arm_sme.tile_load %base[%c0, %c0], <horizontal> : memref<?x?xi128>, vector<[1]x[1]xi128>
257+
%tile = arm_sme.tile_load %base[%c0, %c0] layout<horizontal> : memref<?x?xi128>, vector<[1]x[1]xi128>
257258
```
258259
}];
259260
let arguments = (ins
260261
Arg<AnyMemRef, "the reference to load from", [MemRead]>:$base,
261262
Variadic<Index>:$indices,
262-
DefaultValuedAttr<ArmSME_TileSliceLayoutAttr,
263-
"::mlir::arm_sme::TileSliceLayout::Horizontal">:$layout
263+
ArmSME_TileSliceLayoutAttr:$layout
264264
);
265265
let results = (outs SMETile:$result);
266266

@@ -274,7 +274,7 @@ def TileLoadOp : ArmSME_Op<"tile_load"> {
274274
}];
275275

276276
let assemblyFormat =
277-
"$base `[` $indices `]` (`,` $layout^)? attr-dict "
277+
"$base `[` $indices `]` (`layout` `` $layout^)? attr-dict "
278278
"`:` type($base) `,` type($result)";
279279
}
280280

@@ -296,19 +296,17 @@ def TileStoreOp : ArmSME_Op<"tile_store"> {
296296

297297
Example 2: Store a FP 32-bit element ZA tile with vertical layout to memory.
298298
```mlir
299-
arm_sme.tile_store %tile, %base[%c0, %c0], <vertical> : vector<[4]x[4]xf32>, memref<?x?xf32>
299+
arm_sme.tile_store %tile, %base[%c0, %c0] layout<vertical> : vector<[4]x[4]xf32>, memref<?x?xf32>
300300
```
301301

302302
Example 3: Store a 128-bit element ZA tile with horizontal (default) layout to memory.
303303
```mlir
304-
arm_sme.tile_store %tile, %base[%c0, %c0], <horizontal> : vector<[1]x[1]xi128>, memref<?x?xi128>
304+
arm_sme.tile_store %tile, %base[%c0, %c0] layout<horizontal> : vector<[1]x[1]xi128>, memref<?x?xi128>
305305
```
306306
}];
307307
let arguments = (ins SMETile:$valueToStore,
308308
Arg<AnyMemRef, "the reference to store to", [MemWrite]>:$base,
309-
Variadic<Index>:$indices,
310-
DefaultValuedAttr<ArmSME_TileSliceLayoutAttr,
311-
"::mlir::arm_sme::TileSliceLayout::Horizontal">:$layout
309+
Variadic<Index>:$indices, ArmSME_TileSliceLayoutAttr:$layout
312310
);
313311
let extraClassDeclaration = [{
314312
MemRefType getMemRefType() {
@@ -320,7 +318,7 @@ def TileStoreOp : ArmSME_Op<"tile_store"> {
320318
}];
321319

322320
let assemblyFormat =
323-
"$valueToStore `,` $base `[` $indices `]` (`,` $layout^)? attr-dict "
321+
"$valueToStore `,` $base `[` $indices `]` (`layout` `` $layout^)? attr-dict "
324322
"`:` type($base) `,` type($valueToStore)";
325323
}
326324

@@ -348,19 +346,18 @@ def LoadTileSliceOp : ArmSME_Op<"load_tile_slice", [
348346

349347
Example 2: Load a vector<[4]xf32> tile slice from memory into tile vertically at given index.
350348
```mlir
351-
%tile_update = arm_sme.load_tile_slice %base[%c0], %tile, %tile_slice_index, <vertical> : memref<?x?xf32>, vector<[4]x[4]xf32>
349+
%tile_update = arm_sme.load_tile_slice %base[%c0], %tile, %tile_slice_index layout<vertical> : memref<?x?xf32>, vector<[4]x[4]xf32>
352350
```
353351

354352
Example 3: Load a vector<[1]xi128> tile slice from memory into tile vertically at given index.
355353
```mlir
356-
%tile_update = arm_sme.load_tile_slice %base[%c0], %tile, %tile_slice_index, <vertical> : memref<?x?xi128>, vector<[1]x[1]xi128>
354+
%tile_update = arm_sme.load_tile_slice %base[%c0], %tile, %tile_slice_index layout<vertical> : memref<?x?xi128>, vector<[1]x[1]xi128>
357355
```
358356
}];
359357
let arguments = (ins
360358
Arg<AnyMemRef, "the reference to load from">:$base,
361359
SMETile:$tile, Variadic<Index>:$indices, Index:$tile_slice_index,
362-
DefaultValuedAttr<ArmSME_TileSliceLayoutAttr,
363-
"::mlir::arm_sme::TileSliceLayout::Horizontal">:$layout
360+
ArmSME_TileSliceLayoutAttr:$layout
364361
);
365362
let results = (outs SMETile:$result);
366363

@@ -374,7 +371,7 @@ def LoadTileSliceOp : ArmSME_Op<"load_tile_slice", [
374371
}];
375372

376373
let assemblyFormat = [{
377-
$base `[` $indices `]` `,` $tile `,` $tile_slice_index (`,` $layout^)?
374+
$base `[` $indices `]` `,` $tile `,` $tile_slice_index (`layout` `` $layout^)?
378375
attr-dict `:` type($base) `,` type($result)
379376
}];
380377
}
@@ -401,19 +398,17 @@ def StoreTileSliceOp : ArmSME_Op<"store_tile_slice"> {
401398

402399
Example 2: Store vector<[4]xf32> vertical tile slice from tile at given index to memory.
403400
```mlir
404-
arm_sme.store_tile_slice %tile, %tile_slice_index, %base[%c0], <vertical> : vector<[4]x[4]xf32>, memref<?x?xf32>
401+
arm_sme.store_tile_slice %tile, %tile_slice_index, %base[%c0] layout<vertical> : vector<[4]x[4]xf32>, memref<?x?xf32>
405402
```
406403

407404
Example 3: Store a vector<[1]xi128> vertical tile slice from tile at given index to memory.
408405
```mlir
409-
arm_sme.store_tile_slice %tile, %tile_slice_index, %base[%c0], <vertical> : vector<[1]x[1]xi128>, memref<?x?xi128>
406+
arm_sme.store_tile_slice %tile, %tile_slice_index, %base[%c0] layout<vertical> : vector<[1]x[1]xi128>, memref<?x?xi128>
410407
```
411408
}];
412409
let arguments = (ins SMETile:$tile, Index:$tile_slice_index,
413410
Arg<AnyMemRef, "the reference to store to", [MemWrite]>:$base,
414-
Variadic<Index>:$indices,
415-
DefaultValuedAttr<ArmSME_TileSliceLayoutAttr,
416-
"::mlir::arm_sme::TileSliceLayout::Horizontal">:$layout
411+
Variadic<Index>:$indices, ArmSME_TileSliceLayoutAttr:$layout
417412
);
418413
let extraClassDeclaration = [{
419414
MemRefType getMemRefType() {
@@ -425,7 +420,7 @@ def StoreTileSliceOp : ArmSME_Op<"store_tile_slice"> {
425420
}];
426421

427422
let assemblyFormat = [{
428-
$tile `,` $tile_slice_index `,` $base `[` $indices `]` (`,` $layout^)?
423+
$tile `,` $tile_slice_index `,` $base `[` $indices `]` (`layout` `` $layout^)?
429424
attr-dict `:` type($base) `,` type($tile)
430425
}];
431426
}

‎mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,7 @@ struct TileLoadOpConversion : public OpRewritePattern<arm_sme::TileLoadOp> {
134134
///
135135
/// BEFORE:
136136
/// ```mlir
137-
/// arm_sme.tile_store %tile, %dest[%c0, %c0], <vertical>
137+
/// arm_sme.tile_store %tile, %dest[%c0, %c0] layout<vertical>
138138
/// : memref<?x?xi32>, vector<[4]x[4]xi32
139139
/// ```
140140
///
@@ -147,7 +147,7 @@ struct TileLoadOpConversion : public OpRewritePattern<arm_sme::TileLoadOp> {
147147
/// %svl_s = arith.muli %min_svl_s, %vscale : index
148148
/// scf.for %tile_slice_idx = %c0 to %svl_s step %c1 {
149149
/// arm_sme.store_tile_slice %tile, %tile_slice_idx, %dest[%tile_slice_idx],
150-
/// <vertical> : memref<?x?xi32>, vector<[4]x[4]xi32>
150+
/// layout<vertical> : memref<?x?xi32>, vector<[4]x[4]xi32>
151151
/// }
152152
/// ```
153153
struct TileStoreOpConversion : public OpRewritePattern<arm_sme::TileStoreOp> {

‎mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -67,7 +67,7 @@ namespace {
6767
///
6868
/// is converted to:
6969
///
70-
/// arm_sme.tile_load ... <vertical>
70+
/// arm_sme.tile_load ... layout<vertical>
7171
struct TransferReadPermutationToArmSMELowering
7272
: public OpRewritePattern<vector::TransferReadOp> {
7373
using OpRewritePattern<vector::TransferReadOp>::OpRewritePattern;
@@ -368,8 +368,8 @@ struct SplatOpToArmSMELowering : public OpRewritePattern<vector::SplatOp> {
368368
/// %alloca = memref.alloca(%svl_s, %svl_s) : memref<?x?xi32>
369369
/// %arm_sme.tile_store %src, <hor>, %alloca[%c0, %c0]
370370
/// : memref<?x?xi32>, vector<[4]x[4]xi32>
371-
/// %transposed_src = arm_sme.tile_load %alloca[%c0, %c0], <vertical>
372-
/// : memref<?x?xi32>, vector<[4]x[4]xi32>
371+
/// %transposed_src = arm_sme.tile_load %alloca[%c0, %c0]
372+
/// layout<vertical> : memref<?x?xi32>, vector<[4]x[4]xi32>
373373
///
374374
/// NOTE: Tranposing via memory is obviously expensive, the current intention
375375
/// is to avoid the transpose if possible, this is therefore intended as a

‎mlir/test/Conversion/ArmSMEToSCF/arm-sme-to-scf.mlir‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -21,10 +21,10 @@ func.func @arm_sme_tile_load_hor(%src : memref<?x?xi32>) {
2121
// -----
2222

2323
// CHECK-LABEL: @arm_sme_tile_load_ver
24-
// CHECK: arm_sme.load_tile_slice {{.*}} <vertical>
24+
// CHECK: arm_sme.load_tile_slice {{.*}} layout<vertical>
2525
func.func @arm_sme_tile_load_ver(%src : memref<?x?xi32>) {
2626
%c0 = arith.constant 0 : index
27-
%tile = arm_sme.tile_load %src[%c0, %c0], <vertical> : memref<?x?xi32>, vector<[4]x[4]xi32>
27+
%tile = arm_sme.tile_load %src[%c0, %c0] layout<vertical> : memref<?x?xi32>, vector<[4]x[4]xi32>
2828
return
2929
}
3030

@@ -50,10 +50,10 @@ func.func @arm_sme_tile_store_hor(%tile : vector<[4]x[4]xi32>, %dest : memref<?x
5050
// -----
5151

5252
// CHECK-LABEL: @arm_sme_tile_store_ver
53-
// CHECK: arm_sme.store_tile_slice {{.*}} <vertical>
53+
// CHECK: arm_sme.store_tile_slice {{.*}} layout<vertical>
5454
func.func @arm_sme_tile_store_ver(%tile : vector<[4]x[4]xi32>, %dest : memref<?x?xi32>) {
5555
%c0 = arith.constant 0 : index
56-
arm_sme.tile_store %tile, %dest[%c0, %c0], <vertical> : memref<?x?xi32>, vector<[4]x[4]xi32>
56+
arm_sme.tile_store %tile, %dest[%c0, %c0] layout<vertical> : memref<?x?xi32>, vector<[4]x[4]xi32>
5757
return
5858
}
5959

‎mlir/test/Dialect/ArmSME/arm-sme-to-llvm.mlir‎

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -116,7 +116,7 @@ func.func @arm_sme_load_tile_slice_hor_f64(%src : memref<?x?xf64>, %tile : vecto
116116
// CHECK: "arm_sme.intr.ld1b.vert"({{.*}}) : (vector<[16]xi1>, !llvm.ptr, i32, i32) -> ()
117117
func.func @arm_sme_load_tile_slice_ver_i8(%src : memref<?x?xi8>, %tile : vector<[16]x[16]xi8>, %tile_slice_index : index) {
118118
%c0 = arith.constant 0 : index
119-
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index, <vertical> : memref<?x?xi8>, vector<[16]x[16]xi8>
119+
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index layout<vertical> : memref<?x?xi8>, vector<[16]x[16]xi8>
120120
return
121121
}
122122

@@ -126,7 +126,7 @@ func.func @arm_sme_load_tile_slice_ver_i8(%src : memref<?x?xi8>, %tile : vector<
126126
// CHECK: "arm_sme.intr.ld1h.vert"({{.*}}) : (vector<[8]xi1>, !llvm.ptr, i32, i32) -> ()
127127
func.func @arm_sme_load_tile_slice_ver_i16(%src : memref<?x?xi16>, %tile : vector<[8]x[8]xi16>, %tile_slice_index : index) {
128128
%c0 = arith.constant 0 : index
129-
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index, <vertical> : memref<?x?xi16>, vector<[8]x[8]xi16>
129+
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index layout<vertical> : memref<?x?xi16>, vector<[8]x[8]xi16>
130130
return
131131
}
132132

@@ -136,7 +136,7 @@ func.func @arm_sme_load_tile_slice_ver_i16(%src : memref<?x?xi16>, %tile : vecto
136136
// CHECK: "arm_sme.intr.ld1w.vert"({{.*}}) : (vector<[4]xi1>, !llvm.ptr, i32, i32) -> ()
137137
func.func @arm_sme_load_tile_slice_ver_i32(%src : memref<?x?xi32>, %tile : vector<[4]x[4]xi32>, %tile_slice_index : index) {
138138
%c0 = arith.constant 0 : index
139-
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index, <vertical> : memref<?x?xi32>, vector<[4]x[4]xi32>
139+
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index layout<vertical> : memref<?x?xi32>, vector<[4]x[4]xi32>
140140
return
141141
}
142142

@@ -146,7 +146,7 @@ func.func @arm_sme_load_tile_slice_ver_i32(%src : memref<?x?xi32>, %tile : vecto
146146
// CHECK: "arm_sme.intr.ld1d.vert"({{.*}}) : (vector<[2]xi1>, !llvm.ptr, i32, i32) -> ()
147147
func.func @arm_sme_load_tile_slice_ver_i64(%src : memref<?x?xi64>, %tile : vector<[2]x[2]xi64>, %tile_slice_index : index) {
148148
%c0 = arith.constant 0 : index
149-
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index, <vertical> : memref<?x?xi64>, vector<[2]x[2]xi64>
149+
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index layout<vertical> : memref<?x?xi64>, vector<[2]x[2]xi64>
150150
return
151151
}
152152

@@ -156,7 +156,7 @@ func.func @arm_sme_load_tile_slice_ver_i64(%src : memref<?x?xi64>, %tile : vecto
156156
// CHECK: "arm_sme.intr.ld1q.vert"({{.*}}) : (vector<[1]xi1>, !llvm.ptr, i32, i32) -> ()
157157
func.func @arm_sme_load_tile_slice_ver_i128(%src : memref<?x?xi128>, %tile : vector<[1]x[1]xi128>, %tile_slice_index : index) {
158158
%c0 = arith.constant 0 : index
159-
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index, <vertical> : memref<?x?xi128>, vector<[1]x[1]xi128>
159+
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index layout<vertical> : memref<?x?xi128>, vector<[1]x[1]xi128>
160160
return
161161
}
162162

@@ -166,7 +166,7 @@ func.func @arm_sme_load_tile_slice_ver_i128(%src : memref<?x?xi128>, %tile : vec
166166
// CHECK: "arm_sme.intr.ld1h.vert"({{.*}}) : (vector<[8]xi1>, !llvm.ptr, i32, i32) -> ()
167167
func.func @arm_sme_load_tile_slice_ver_f16(%src : memref<?x?xf16>, %tile : vector<[8]x[8]xf16>, %tile_slice_index : index) {
168168
%c0 = arith.constant 0 : index
169-
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index, <vertical> : memref<?x?xf16>, vector<[8]x[8]xf16>
169+
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index layout<vertical> : memref<?x?xf16>, vector<[8]x[8]xf16>
170170
return
171171
}
172172

@@ -176,7 +176,7 @@ func.func @arm_sme_load_tile_slice_ver_f16(%src : memref<?x?xf16>, %tile : vecto
176176
// CHECK: "arm_sme.intr.ld1h.vert"({{.*}}) : (vector<[8]xi1>, !llvm.ptr, i32, i32) -> ()
177177
func.func @arm_sme_load_tile_slice_ver_bf16(%src : memref<?x?xbf16>, %tile : vector<[8]x[8]xbf16>, %tile_slice_index : index) {
178178
%c0 = arith.constant 0 : index
179-
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index, <vertical> : memref<?x?xbf16>, vector<[8]x[8]xbf16>
179+
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index layout<vertical> : memref<?x?xbf16>, vector<[8]x[8]xbf16>
180180
return
181181
}
182182

@@ -186,7 +186,7 @@ func.func @arm_sme_load_tile_slice_ver_bf16(%src : memref<?x?xbf16>, %tile : vec
186186
// CHECK: "arm_sme.intr.ld1w.vert"({{.*}}) : (vector<[4]xi1>, !llvm.ptr, i32, i32) -> ()
187187
func.func @arm_sme_load_tile_slice_ver_f32(%src : memref<?x?xf32>, %tile : vector<[4]x[4]xf32>, %tile_slice_index : index) {
188188
%c0 = arith.constant 0 : index
189-
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index, <vertical> : memref<?x?xf32>, vector<[4]x[4]xf32>
189+
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index layout<vertical> : memref<?x?xf32>, vector<[4]x[4]xf32>
190190
return
191191
}
192192

@@ -196,7 +196,7 @@ func.func @arm_sme_load_tile_slice_ver_f32(%src : memref<?x?xf32>, %tile : vecto
196196
// CHECK: "arm_sme.intr.ld1d.vert"({{.*}}) : (vector<[2]xi1>, !llvm.ptr, i32, i32) -> ()
197197
func.func @arm_sme_load_tile_slice_ver_f64(%src : memref<?x?xf64>, %tile : vector<[2]x[2]xf64>, %tile_slice_index : index) {
198198
%c0 = arith.constant 0 : index
199-
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index, <vertical> : memref<?x?xf64>, vector<[2]x[2]xf64>
199+
%tile_update = arm_sme.load_tile_slice %src[%c0], %tile, %tile_slice_index layout<vertical> : memref<?x?xf64>, vector<[2]x[2]xf64>
200200
return
201201
}
202202

@@ -316,7 +316,7 @@ func.func @arm_sme_store_tile_slice_hor_f64(%tile : vector<[2]x[2]xf64>, %tile_s
316316
// CHECK: "arm_sme.intr.st1b.vert"({{.*}}) : (vector<[16]xi1>, !llvm.ptr, i32, i32) -> ()
317317
func.func @arm_sme_store_tile_slice_ver_i8(%tile : vector<[16]x[16]xi8>, %tile_slice_index : index, %dest : memref<?x?xi8>) -> () {
318318
%c0 = arith.constant 0 : index
319-
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0], <vertical> : memref<?x?xi8>, vector<[16]x[16]xi8>
319+
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0] layout<vertical> : memref<?x?xi8>, vector<[16]x[16]xi8>
320320
return
321321
}
322322

@@ -326,7 +326,7 @@ func.func @arm_sme_store_tile_slice_ver_i8(%tile : vector<[16]x[16]xi8>, %tile_s
326326
// CHECK: "arm_sme.intr.st1h.vert"({{.*}}) : (vector<[8]xi1>, !llvm.ptr, i32, i32) -> ()
327327
func.func @arm_sme_store_tile_slice_ver_i16(%tile : vector<[8]x[8]xi16>, %tile_slice_index : index, %dest : memref<?x?xi16>) -> () {
328328
%c0 = arith.constant 0 : index
329-
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0], <vertical> : memref<?x?xi16>, vector<[8]x[8]xi16>
329+
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0] layout<vertical> : memref<?x?xi16>, vector<[8]x[8]xi16>
330330
return
331331
}
332332

@@ -336,7 +336,7 @@ func.func @arm_sme_store_tile_slice_ver_i16(%tile : vector<[8]x[8]xi16>, %tile_s
336336
// CHECK: "arm_sme.intr.st1w.vert"({{.*}}) : (vector<[4]xi1>, !llvm.ptr, i32, i32) -> ()
337337
func.func @arm_sme_store_tile_slice_ver_i32(%tile : vector<[4]x[4]xi32>, %tile_slice_index : index, %dest : memref<?x?xi32>) -> () {
338338
%c0 = arith.constant 0 : index
339-
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0], <vertical> : memref<?x?xi32>, vector<[4]x[4]xi32>
339+
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0] layout<vertical> : memref<?x?xi32>, vector<[4]x[4]xi32>
340340
return
341341
}
342342

@@ -346,7 +346,7 @@ func.func @arm_sme_store_tile_slice_ver_i32(%tile : vector<[4]x[4]xi32>, %tile_s
346346
// CHECK: "arm_sme.intr.st1d.vert"({{.*}}) : (vector<[2]xi1>, !llvm.ptr, i32, i32) -> ()
347347
func.func @arm_sme_store_tile_slice_ver_i64(%tile : vector<[2]x[2]xi64>, %tile_slice_index : index, %dest : memref<?x?xi64>) -> () {
348348
%c0 = arith.constant 0 : index
349-
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0], <vertical> : memref<?x?xi64>, vector<[2]x[2]xi64>
349+
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0] layout<vertical> : memref<?x?xi64>, vector<[2]x[2]xi64>
350350
return
351351
}
352352

@@ -356,7 +356,7 @@ func.func @arm_sme_store_tile_slice_ver_i64(%tile : vector<[2]x[2]xi64>, %tile_s
356356
// CHECK: "arm_sme.intr.st1q.vert"({{.*}}) : (vector<[1]xi1>, !llvm.ptr, i32, i32) -> ()
357357
func.func @arm_sme_store_tile_slice_ver_i128(%tile : vector<[1]x[1]xi128>, %tile_slice_index : index, %dest : memref<?x?xi128>) -> () {
358358
%c0 = arith.constant 0 : index
359-
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0], <vertical> : memref<?x?xi128>, vector<[1]x[1]xi128>
359+
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0] layout<vertical> : memref<?x?xi128>, vector<[1]x[1]xi128>
360360
return
361361
}
362362

@@ -366,7 +366,7 @@ func.func @arm_sme_store_tile_slice_ver_i128(%tile : vector<[1]x[1]xi128>, %tile
366366
// CHECK: "arm_sme.intr.st1h.vert"({{.*}}) : (vector<[8]xi1>, !llvm.ptr, i32, i32) -> ()
367367
func.func @arm_sme_store_tile_slice_ver_f16(%tile : vector<[8]x[8]xf16>, %tile_slice_index : index, %dest : memref<?x?xf16>) -> () {
368368
%c0 = arith.constant 0 : index
369-
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0], <vertical> : memref<?x?xf16>, vector<[8]x[8]xf16>
369+
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0] layout<vertical> : memref<?x?xf16>, vector<[8]x[8]xf16>
370370
return
371371
}
372372

@@ -376,7 +376,7 @@ func.func @arm_sme_store_tile_slice_ver_f16(%tile : vector<[8]x[8]xf16>, %tile_s
376376
// CHECK: "arm_sme.intr.st1h.vert"({{.*}}) : (vector<[8]xi1>, !llvm.ptr, i32, i32) -> ()
377377
func.func @arm_sme_store_tile_slice_ver_bf16(%tile : vector<[8]x[8]xbf16>, %tile_slice_index : index, %dest : memref<?x?xbf16>) -> () {
378378
%c0 = arith.constant 0 : index
379-
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0], <vertical> : memref<?x?xbf16>, vector<[8]x[8]xbf16>
379+
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0] layout<vertical> : memref<?x?xbf16>, vector<[8]x[8]xbf16>
380380
return
381381
}
382382

@@ -386,7 +386,7 @@ func.func @arm_sme_store_tile_slice_ver_bf16(%tile : vector<[8]x[8]xbf16>, %tile
386386
// CHECK: "arm_sme.intr.st1w.vert"({{.*}}) : (vector<[4]xi1>, !llvm.ptr, i32, i32) -> ()
387387
func.func @arm_sme_store_tile_slice_ver_f32(%tile : vector<[4]x[4]xf32>, %tile_slice_index : index, %dest : memref<?x?xf32>) -> () {
388388
%c0 = arith.constant 0 : index
389-
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0], <vertical> : memref<?x?xf32>, vector<[4]x[4]xf32>
389+
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0] layout<vertical> : memref<?x?xf32>, vector<[4]x[4]xf32>
390390
return
391391
}
392392

@@ -396,7 +396,7 @@ func.func @arm_sme_store_tile_slice_ver_f32(%tile : vector<[4]x[4]xf32>, %tile_s
396396
// CHECK: "arm_sme.intr.st1d.vert"({{.*}}) : (vector<[2]xi1>, !llvm.ptr, i32, i32) -> ()
397397
func.func @arm_sme_store_tile_slice_ver_f64(%tile : vector<[2]x[2]xf64>, %tile_slice_index : index, %dest : memref<?x?xf64>) -> () {
398398
%c0 = arith.constant 0 : index
399-
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0], <vertical> : memref<?x?xf64>, vector<[2]x[2]xf64>
399+
arm_sme.store_tile_slice %tile, %tile_slice_index, %dest[%c0] layout<vertical> : memref<?x?xf64>, vector<[2]x[2]xf64>
400400
return
401401
}
402402

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