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Refactored the code in order to encapsulate redundant code as lambda function.
1 parent 6e3bca2 commit c88fb17

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+16
-24
lines changed

1 file changed

+16
-24
lines changed

llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp

Lines changed: 16 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1468,13 +1468,7 @@ static bool checkForRightSrcRootAccess(MachineInstr *Def0MI,
14681468
MachineOperand *Def0Src1 =
14691469
TII->getNamedOperand(*Def0MI, AMDGPU::OpName::src1);
14701470

1471-
if (Def1Src0 && Def1Src0->isReg() && (Def1Src0->getReg() == SrcRootReg)) {
1472-
MachineOperand *Def1Src0Sel =
1473-
TII->getNamedOperand(*Def1MI, AMDGPU::OpName::src0_sel);
1474-
if (!Def1Src0Sel ||
1475-
(Def1Src0Sel->getImm() != AMDGPU::SDWA::SdwaSel::WORD_1))
1476-
return false;
1477-
1471+
auto chkForDef0MIAccess = [&]() -> bool {
14781472
if (Def0Src0 && Def0Src0->isReg() && (Def0Src0->getReg() == SrcRootReg)) {
14791473
MachineOperand *Def0Src0Sel =
14801474
TII->getNamedOperand(*Def0MI, AMDGPU::OpName::src0_sel);
@@ -1492,6 +1486,19 @@ static bool checkForRightSrcRootAccess(MachineInstr *Def0MI,
14921486
if (Def0Src1Sel && Def0Src1Sel->getImm() == AMDGPU::SDWA::SdwaSel::WORD_0)
14931487
return true;
14941488
}
1489+
1490+
return false;
1491+
};
1492+
1493+
if (Def1Src0 && Def1Src0->isReg() && (Def1Src0->getReg() == SrcRootReg)) {
1494+
MachineOperand *Def1Src0Sel =
1495+
TII->getNamedOperand(*Def1MI, AMDGPU::OpName::src0_sel);
1496+
if (!Def1Src0Sel ||
1497+
(Def1Src0Sel->getImm() != AMDGPU::SDWA::SdwaSel::WORD_1))
1498+
return false;
1499+
1500+
if (chkForDef0MIAccess())
1501+
return true;
14951502
}
14961503

14971504
if (Def1Src1 && Def1Src1->isReg() && (Def1Src1->getReg() == SrcRootReg)) {
@@ -1501,23 +1508,8 @@ static bool checkForRightSrcRootAccess(MachineInstr *Def0MI,
15011508
(Def1Src1Sel->getImm() != AMDGPU::SDWA::SdwaSel::WORD_1))
15021509
return false;
15031510

1504-
if (Def0Src0 && Def0Src0->isReg() && (Def0Src0->getReg() == SrcRootReg)) {
1505-
MachineOperand *Def0Src0Sel =
1506-
TII->getNamedOperand(*Def0MI, AMDGPU::OpName::src0_sel);
1507-
if (!Def0Src0Sel)
1508-
return true;
1509-
if (Def0Src0Sel && Def0Src0Sel->getImm() == AMDGPU::SDWA::SdwaSel::WORD_0)
1510-
return true;
1511-
}
1512-
1513-
if (Def0Src1 && Def0Src1->isReg() && (Def0Src1->getReg() == SrcRootReg)) {
1514-
MachineOperand *Def0Src1Sel =
1515-
TII->getNamedOperand(*Def0MI, AMDGPU::OpName::src1_sel);
1516-
if (!Def0Src1Sel)
1517-
return true;
1518-
if (Def0Src1Sel && Def0Src1Sel->getImm() == AMDGPU::SDWA::SdwaSel::WORD_0)
1519-
return true;
1520-
}
1511+
if (chkForDef0MIAccess())
1512+
return true;
15211513
}
15221514

15231515
return false;

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