@@ -27,6 +27,19 @@ define i64 @mul_select(i64 %a, i64 %b) {
2727 ret i64 %select
2828}
2929
30+ ; (select (icmp x, 0, eq), 0, (mul x, y)) -> (mul x, y)
31+ define i64 @mul_select_comm (i64 %a , i64 %b ) {
32+ ; CHECK-LABEL: @mul_select_comm(
33+ ; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
34+ ; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[B_FR]], [[A:%.*]]
35+ ; CHECK-NEXT: ret i64 [[MUL]]
36+ ;
37+ %cond = icmp eq i64 %a , 0
38+ %mul = mul i64 %b , %a
39+ %select = select i1 %cond , i64 0 , i64 %mul
40+ ret i64 %select
41+ }
42+
3043; (select (icmp x, 0, eq), 0, (shl x, y)) -> (shl x, y)
3144define i64 @shl_select (i64 %a , i64 %b ) {
3245; CHECK-LABEL: @shl_select(
@@ -54,6 +67,19 @@ define i64 @and_select(i64 %a, i64 %b) {
5467 ret i64 %select
5568}
5669
70+ ; (select (icmp x, 0, eq), 0, (and x, y)) -> (and x, y)
71+ define i64 @and_select_comm (i64 %a , i64 %b ) {
72+ ; CHECK-LABEL: @and_select_comm(
73+ ; CHECK-NEXT: [[B_FR:%.*]] = freeze i64 [[B:%.*]]
74+ ; CHECK-NEXT: [[AND:%.*]] = and i64 [[B_FR]], [[A:%.*]]
75+ ; CHECK-NEXT: ret i64 [[AND]]
76+ ;
77+ %cond = icmp eq i64 %a , 0
78+ %and = and i64 %b , %a
79+ %select = select i1 %cond , i64 0 , i64 %and
80+ ret i64 %select
81+ }
82+
5783; (select (icmp x, 0, ne), (ashr x, y), 0) -> (ashr x, y)
5884define i64 @ashr_select (i64 %a , i64 %b ) {
5985; CHECK-LABEL: @ashr_select(
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