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Update tests.
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‎clang/test/CodeGen/PowerPC/altivec.c‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -12,8 +12,8 @@
1212
// RUN: %clang -S -emit-llvm -maltivec -mabi=vec-default -mcpu=pwr8 --target=powerpc64-unknown-aix -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-BE
1313
// Check initialization
1414

15-
vector int test0 = (vector int)(1); // CHECK: @test0 ={{.*}} global <4 x i32> <i32 1, i32 1, i32 1, i32 1>
16-
vector float test1 = (vector float)(1.0); // CHECK: @test1 ={{.*}} global <4 x float> <float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}>
15+
vector int test0 = (vector int)(1); // CHECK: @test0 ={{.*}} global <4 x i32> splat (i32 1)
16+
vector float test1 = (vector float)(1.0); // CHECK: @test1 ={{.*}} global <4 x float> splat (float 1.000000e+{{0+}})
1717

1818
// CHECK-BE: @v1 ={{.*}} global <16 x i8> <i8 0, i8 0, i8 0, i8 1, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 4>
1919
// CHECK-LE: @v1 ={{.*}} global <16 x i8> <i8 1, i8 0, i8 0, i8 0, i8 2, i8 0, i8 0, i8 0, i8 3, i8 0, i8 0, i8 0, i8 4, i8 0, i8 0, i8 0>
@@ -32,8 +32,8 @@ void test2(void)
3232
{
3333
vector int vi;
3434
vector float vf;
35-
vi = (vector int)(1); // CHECK: <i32 1, i32 1, i32 1, i32 1>
36-
vf = (vector float)(1.0); // CHECK: <float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}>
35+
vi = (vector int)(1); // CHECK: splat (i32 1)
36+
vf = (vector float)(1.0); // CHECK: splat (float 1.000000e+{{0+}})
3737
vi = (vector int)(1, 2, 3, 4); // CHECK: <i32 1, i32 2, i32 3, i32 4>
3838
vi = (vector int)(1, 2, 3, 4, 5); // CHECK: <i32 1, i32 2, i32 3, i32 4>
3939

@@ -46,9 +46,9 @@ void test2(void)
4646
// Check pre/post increment/decrement
4747
void test3(void) {
4848
vector int vi;
49-
vi++; // CHECK: add <4 x i32> {{.*}} <i32 1, i32 1, i32 1, i32 1>
49+
vi++; // CHECK: add <4 x i32> {{.*}} splat (i32 1)
5050
vector unsigned int vui;
51-
--vui; // CHECK: add <4 x i32> {{.*}} <i32 -1, i32 -1, i32 -1, i32 -1>
51+
--vui; // CHECK: add <4 x i32> {{.*}} splat (i32 -1)
5252
vector float vf;
53-
vf++; // CHECK: fadd <4 x float> {{.*}} <float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}, float 1.000000e+{{0+}}>
53+
vf++; // CHECK: fadd <4 x float> {{.*}} splat (float 1.000000e+{{0+}})
5454
}

‎clang/test/CodeGen/PowerPC/builtins-ppc-altivec.c‎

Lines changed: 51 additions & 51 deletions
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‎clang/test/CodeGen/PowerPC/builtins-ppc-fastmath.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -42,7 +42,7 @@ vector double test_flags_recipdivd() {
4242
// CHECK-LABEL: @test_flags_rsqrtf(
4343
// CHECK: [[TMP0:%.*]] = load <4 x float>, ptr @a, align 16
4444
// CHECK-NEXT: [[TMP1:%.*]] = call fast <4 x float> @llvm.sqrt.v4f32(<4 x float> [[TMP0]])
45-
// CHECK-NEXT: [[RSQRT:%.*]] = fdiv fast <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, [[TMP1]]
45+
// CHECK-NEXT: [[RSQRT:%.*]] = fdiv fast <4 x float> splat (float 1.000000e+00), [[TMP1]]
4646
// CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, ptr @b, align 16
4747
// CHECK-NEXT: [[ADD:%.*]] = fadd <4 x float> [[RSQRT]], [[TMP2]]
4848
// CHECK-NEXT: ret <4 x float> [[ADD]]
@@ -54,7 +54,7 @@ vector float test_flags_rsqrtf() {
5454
// CHECK-LABEL: @test_flags_rsqrtd(
5555
// CHECK: [[TMP0:%.*]] = load <2 x double>, ptr @d, align 16
5656
// CHECK-NEXT: [[TMP1:%.*]] = call fast <2 x double> @llvm.sqrt.v2f64(<2 x double> [[TMP0]])
57-
// CHECK-NEXT: [[RSQRT:%.*]] = fdiv fast <2 x double> <double 1.000000e+00, double 1.000000e+00>, [[TMP1]]
57+
// CHECK-NEXT: [[RSQRT:%.*]] = fdiv fast <2 x double> splat (double 1.000000e+00), [[TMP1]]
5858
// CHECK-NEXT: [[TMP2:%.*]] = load <2 x double>, ptr @e, align 16
5959
// CHECK-NEXT: [[ADD:%.*]] = fadd <2 x double> [[RSQRT]], [[TMP2]]
6060
// CHECK-NEXT: ret <2 x double> [[ADD]]

‎clang/test/CodeGen/PowerPC/builtins-ppc-p10vector.c‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1535,17 +1535,17 @@ vector unsigned long long test_vec_extracth_ul(void) {
15351535
}
15361536

15371537
vector signed int test_vec_vec_splati_si(void) {
1538-
// CHECK: ret <4 x i32> <i32 -17, i32 -17, i32 -17, i32 -17>
1538+
// CHECK: ret <4 x i32> splat (i32 -17)
15391539
return vec_splati(-17);
15401540
}
15411541

15421542
vector unsigned int test_vec_vec_splati_ui(void) {
1543-
// CHECK: ret <4 x i32> <i32 16, i32 16, i32 16, i32 16>
1543+
// CHECK: ret <4 x i32> splat (i32 16)
15441544
return vec_splati(16U);
15451545
}
15461546

15471547
vector float test_vec_vec_splati_f(void) {
1548-
// CHECK: ret <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
1548+
// CHECK: ret <4 x float> splat (float 1.000000e+00)
15491549
return vec_splati(1.0f);
15501550
}
15511551

@@ -1863,23 +1863,23 @@ vector bool __int128 test_vec_cmpeq_bool_int128(void) {
18631863
vector bool __int128 test_vec_cmpne_s128(void) {
18641864
// CHECK-LABEL: @test_vec_cmpne_s128(
18651865
// CHECK: call <1 x i128> @llvm.ppc.altivec.vcmpequq(<1 x i128>
1866-
// CHECK-NEXT: %not.i = xor <1 x i128> %4, <i128 -1>
1866+
// CHECK-NEXT: %not.i = xor <1 x i128> %4, splat (i128 -1)
18671867
// CHECK-NEXT: ret <1 x i128> %not.i
18681868
return vec_cmpne(vsi128a, vsi128b);
18691869
}
18701870

18711871
vector bool __int128 test_vec_cmpne_u128(void) {
18721872
// CHECK-LABEL: @test_vec_cmpne_u128(
18731873
// CHECK: call <1 x i128> @llvm.ppc.altivec.vcmpequq(<1 x i128>
1874-
// CHECK-NEXT: xor <1 x i128> %4, <i128 -1>
1874+
// CHECK-NEXT: xor <1 x i128> %4, splat (i128 -1)
18751875
// CHECK-NEXT: ret <1 x i128>
18761876
return vec_cmpne(vui128a, vui128b);
18771877
}
18781878

18791879
vector bool __int128 test_vec_cmpne_bool_int128(void) {
18801880
// CHECK-LABEL: @test_vec_cmpne_bool_int128(
18811881
// CHECK: call <1 x i128> @llvm.ppc.altivec.vcmpequq(<1 x i128>
1882-
// CHECK-NEXT: xor <1 x i128> %4, <i128 -1>
1882+
// CHECK-NEXT: xor <1 x i128> %4, splat (i128 -1)
18831883
// CHECK-NEXT: ret <1 x i128>
18841884
return vec_cmpne(vbi128a, vbi128b);
18851885
}
@@ -1915,31 +1915,31 @@ vector bool __int128 test_vec_cmplt_u128(void) {
19151915
vector bool __int128 test_vec_cmpge_s128(void) {
19161916
// CHECK-LABEL: @test_vec_cmpge_s128(
19171917
// CHECK: call <1 x i128> @llvm.ppc.altivec.vcmpgtsq(<1 x i128>
1918-
// CHECK-NEXT: xor <1 x i128> %6, <i128 -1>
1918+
// CHECK-NEXT: xor <1 x i128> %6, splat (i128 -1)
19191919
// CHECK-NEXT: ret <1 x i128>
19201920
return vec_cmpge(vsi128a, vsi128b);
19211921
}
19221922

19231923
vector bool __int128 test_vec_cmpge_u128(void) {
19241924
// CHECK-LABEL: @test_vec_cmpge_u128(
19251925
// CHECK: call <1 x i128> @llvm.ppc.altivec.vcmpgtuq(<1 x i128>
1926-
// CHECK-NEXT: xor <1 x i128> %6, <i128 -1>
1926+
// CHECK-NEXT: xor <1 x i128> %6, splat (i128 -1)
19271927
// CHECK-NEXT: ret <1 x i128>
19281928
return vec_cmpge(vui128a, vui128b);
19291929
}
19301930

19311931
vector bool __int128 test_vec_cmple_s128(void) {
19321932
// CHECK-LABEL: @test_vec_cmple_s128(
19331933
// CHECK: call <1 x i128> @llvm.ppc.altivec.vcmpgtsq(<1 x i128>
1934-
// CHECK-NEXT: xor <1 x i128> %8, <i128 -1>
1934+
// CHECK-NEXT: xor <1 x i128> %8, splat (i128 -1)
19351935
// CHECK-NEXT: ret <1 x i128>
19361936
return vec_cmple(vsi128a, vsi128b);
19371937
}
19381938

19391939
vector bool __int128 test_vec_cmple_u128(void) {
19401940
// CHECK-LABEL: @test_vec_cmple_u128(
19411941
// CHECK: call <1 x i128> @llvm.ppc.altivec.vcmpgtuq(<1 x i128>
1942-
// CHECK-NEXT: xor <1 x i128> %8, <i128 -1>
1942+
// CHECK-NEXT: xor <1 x i128> %8, splat (i128 -1)
19431943
// CHECK-NEXT: ret <1 x i128>
19441944
return vec_cmple(vui128a, vui128b);
19451945
}

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