Normalize XZR to no-reg instead, as it never violates register class

Author: atrosinenko

llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

@@ -3128,17 +3128,18 @@ void AArch64TargetLowering::fixupBlendComponents(
       IntDisc = MaybeBlend->getOperand(2).getImm();
     } else if (MaybeBlend->getOpcode() == AArch64::MOVi32imm &&
                isUInt<16>(MaybeBlend->getOperand(1).getImm())) {
-      AddrDisc = AArch64::XZR;
+      AddrDisc = AArch64::NoRegister;
       IntDisc = MaybeBlend->getOperand(1).getImm();
     }
   }
 
-  // Normalize NoRegister operands emitted by GlobalISel.
-  if (AddrDisc == AArch64::NoRegister)
-    AddrDisc = AArch64::XZR;
+  // For uniformity, always use NoRegister, as XZR is not necessarily contained
+  // in the requested register class.
+  if (AddrDisc == AArch64::XZR)
+    AddrDisc = AArch64::NoRegister;
 
   // Make sure AddrDisc operand respects the register class imposed by MI.
-  if (AddrDisc != AArch64::XZR && MRI.getRegClass(AddrDisc) != AddrDiscRC) {
+  if (AddrDisc && MRI.getRegClass(AddrDisc) != AddrDiscRC) {
     Register TmpReg = MRI.createVirtualRegister(AddrDiscRC);
     BuildMI(*BB, MI, DL, TII->get(AArch64::COPY), TmpReg).addReg(AddrDisc);
     AddrDisc = TmpReg;

llvm/test/CodeGen/AArch64/ptrauth-isel.ll

@@ -30,7 +30,7 @@ define i64 @small_imm_disc(i64 %addr) {
   ; DAGISEL-NEXT:   [[COPY:%[0-9]+]]:gpr64 = COPY $x0
   ; DAGISEL-NEXT:   [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 42
   ; DAGISEL-NEXT:   [[SUBREG_TO_REG:%[0-9]+]]:gpr64noip = SUBREG_TO_REG 0, killed [[MOVi32imm]], %subreg.sub_32
-  ; DAGISEL-NEXT:   [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 42, killed $xzr, implicit-def dead $x17
+  ; DAGISEL-NEXT:   [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 42, killed $noreg, implicit-def dead $x17
   ; DAGISEL-NEXT:   $x0 = COPY [[PAC]]
   ; DAGISEL-NEXT:   RET_ReallyLR implicit $x0
   ;
@@ -41,7 +41,7 @@ define i64 @small_imm_disc(i64 %addr) {
   ; GISEL-NEXT:   [[COPY:%[0-9]+]]:gpr64 = COPY $x0
   ; GISEL-NEXT:   [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 42
   ; GISEL-NEXT:   [[SUBREG_TO_REG:%[0-9]+]]:gpr64noip = SUBREG_TO_REG 0, [[MOVi32imm]], %subreg.sub_32
-  ; GISEL-NEXT:   [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 42, $xzr, implicit-def dead $x17
+  ; GISEL-NEXT:   [[PAC:%[0-9]+]]:gpr64 = PAC [[COPY]], 2, 42, $noreg, implicit-def dead $x17
   ; GISEL-NEXT:   $x0 = COPY [[PAC]]
   ; GISEL-NEXT:   RET_ReallyLR implicit $x0
 entry: