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[WebAssembly] Implement prototype SIMD rounding instructions
Summary: As specified in WebAssembly/simd#232. These instructions are implemented as LLVM intrinsics for now rather than normal ISel patterns to make these instructions opt-in. Once the instructions are merged to the spec proposal, the intrinsics will be replaced with proper ISel patterns. Reviewers: aheejin Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, cfe-commits, llvm-commits Tags: #clang, #llvm Differential Revision: https://reviews.llvm.org/D81222
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‎clang/include/clang/Basic/BuiltinsWebAssembly.def

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -146,6 +146,15 @@ TARGET_BUILTIN(__builtin_wasm_max_f64x2, "V2dV2dV2d", "nc", "simd128")
146146
TARGET_BUILTIN(__builtin_wasm_pmin_f64x2, "V2dV2dV2d", "nc", "simd128")
147147
TARGET_BUILTIN(__builtin_wasm_pmax_f64x2, "V2dV2dV2d", "nc", "simd128")
148148

149+
TARGET_BUILTIN(__builtin_wasm_ceil_f32x4, "V4fV4f", "nc", "simd128")
150+
TARGET_BUILTIN(__builtin_wasm_floor_f32x4, "V4fV4f", "nc", "simd128")
151+
TARGET_BUILTIN(__builtin_wasm_trunc_f32x4, "V4fV4f", "nc", "simd128")
152+
TARGET_BUILTIN(__builtin_wasm_nearest_f32x4, "V4fV4f", "nc", "simd128")
153+
TARGET_BUILTIN(__builtin_wasm_ceil_f64x2, "V2dV2d", "nc", "simd128")
154+
TARGET_BUILTIN(__builtin_wasm_floor_f64x2, "V2dV2d", "nc", "simd128")
155+
TARGET_BUILTIN(__builtin_wasm_trunc_f64x2, "V2dV2d", "nc", "simd128")
156+
TARGET_BUILTIN(__builtin_wasm_nearest_f64x2, "V2dV2d", "nc", "simd128")
157+
149158
TARGET_BUILTIN(__builtin_wasm_dot_s_i32x4_i16x8, "V4iV8sV8s", "nc", "simd128")
150159

151160
TARGET_BUILTIN(__builtin_wasm_sqrt_f32x4, "V4fV4f", "nc", "simd128")

‎clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15951,6 +15951,39 @@ Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
1595115951
CGM.getIntrinsic(Intrinsic::wasm_pmax, ConvertType(E->getType()));
1595215952
return Builder.CreateCall(Callee, {LHS, RHS});
1595315953
}
15954+
case WebAssembly::BI__builtin_wasm_ceil_f32x4:
15955+
case WebAssembly::BI__builtin_wasm_floor_f32x4:
15956+
case WebAssembly::BI__builtin_wasm_trunc_f32x4:
15957+
case WebAssembly::BI__builtin_wasm_nearest_f32x4:
15958+
case WebAssembly::BI__builtin_wasm_ceil_f64x2:
15959+
case WebAssembly::BI__builtin_wasm_floor_f64x2:
15960+
case WebAssembly::BI__builtin_wasm_trunc_f64x2:
15961+
case WebAssembly::BI__builtin_wasm_nearest_f64x2: {
15962+
unsigned IntNo;
15963+
switch (BuiltinID) {
15964+
case WebAssembly::BI__builtin_wasm_ceil_f32x4:
15965+
case WebAssembly::BI__builtin_wasm_ceil_f64x2:
15966+
IntNo = Intrinsic::wasm_ceil;
15967+
break;
15968+
case WebAssembly::BI__builtin_wasm_floor_f32x4:
15969+
case WebAssembly::BI__builtin_wasm_floor_f64x2:
15970+
IntNo = Intrinsic::wasm_floor;
15971+
break;
15972+
case WebAssembly::BI__builtin_wasm_trunc_f32x4:
15973+
case WebAssembly::BI__builtin_wasm_trunc_f64x2:
15974+
IntNo = Intrinsic::wasm_trunc;
15975+
break;
15976+
case WebAssembly::BI__builtin_wasm_nearest_f32x4:
15977+
case WebAssembly::BI__builtin_wasm_nearest_f64x2:
15978+
IntNo = Intrinsic::wasm_nearest;
15979+
break;
15980+
default:
15981+
llvm_unreachable("unexpected builtin ID");
15982+
}
15983+
Value *Value = EmitScalarExpr(E->getArg(0));
15984+
Function *Callee = CGM.getIntrinsic(IntNo, ConvertType(E->getType()));
15985+
return Builder.CreateCall(Callee, Value);
15986+
}
1595415987
case WebAssembly::BI__builtin_wasm_swizzle_v8x16: {
1595515988
Value *Src = EmitScalarExpr(E->getArg(0));
1595615989
Value *Indices = EmitScalarExpr(E->getArg(1));

‎clang/test/CodeGen/builtins-wasm.c

Lines changed: 48 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -621,6 +621,54 @@ f64x2 pmax_f64x2(f64x2 x, f64x2 y) {
621621
// WEBASSEMBLY-NEXT: ret
622622
}
623623

624+
f32x4 ceil_f32x4(f32x4 x) {
625+
return __builtin_wasm_ceil_f32x4(x);
626+
// WEBASSEMBLY: call <4 x float> @llvm.wasm.ceil.v4f32(<4 x float> %x)
627+
// WEBASSEMBLY: ret
628+
}
629+
630+
f32x4 floor_f32x4(f32x4 x) {
631+
return __builtin_wasm_floor_f32x4(x);
632+
// WEBASSEMBLY: call <4 x float> @llvm.wasm.floor.v4f32(<4 x float> %x)
633+
// WEBASSEMBLY: ret
634+
}
635+
636+
f32x4 trunc_f32x4(f32x4 x) {
637+
return __builtin_wasm_trunc_f32x4(x);
638+
// WEBASSEMBLY: call <4 x float> @llvm.wasm.trunc.v4f32(<4 x float> %x)
639+
// WEBASSEMBLY: ret
640+
}
641+
642+
f32x4 nearest_f32x4(f32x4 x) {
643+
return __builtin_wasm_nearest_f32x4(x);
644+
// WEBASSEMBLY: call <4 x float> @llvm.wasm.nearest.v4f32(<4 x float> %x)
645+
// WEBASSEMBLY: ret
646+
}
647+
648+
f64x2 ceil_f64x2(f64x2 x) {
649+
return __builtin_wasm_ceil_f64x2(x);
650+
// WEBASSEMBLY: call <2 x double> @llvm.wasm.ceil.v2f64(<2 x double> %x)
651+
// WEBASSEMBLY: ret
652+
}
653+
654+
f64x2 floor_f64x2(f64x2 x) {
655+
return __builtin_wasm_floor_f64x2(x);
656+
// WEBASSEMBLY: call <2 x double> @llvm.wasm.floor.v2f64(<2 x double> %x)
657+
// WEBASSEMBLY: ret
658+
}
659+
660+
f64x2 trunc_f64x2(f64x2 x) {
661+
return __builtin_wasm_trunc_f64x2(x);
662+
// WEBASSEMBLY: call <2 x double> @llvm.wasm.trunc.v2f64(<2 x double> %x)
663+
// WEBASSEMBLY: ret
664+
}
665+
666+
f64x2 nearest_f64x2(f64x2 x) {
667+
return __builtin_wasm_nearest_f64x2(x);
668+
// WEBASSEMBLY: call <2 x double> @llvm.wasm.nearest.v2f64(<2 x double> %x)
669+
// WEBASSEMBLY: ret
670+
}
671+
624672
f32x4 sqrt_f32x4(f32x4 x) {
625673
return __builtin_wasm_sqrt_f32x4(x);
626674
// WEBASSEMBLY: call <4 x float> @llvm.sqrt.v4f32(<4 x float> %x)

‎llvm/include/llvm/IR/IntrinsicsWebAssembly.td

Lines changed: 21 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -176,8 +176,7 @@ def int_wasm_widen_high_unsigned :
176176
[llvm_anyvector_ty],
177177
[IntrNoMem, IntrSpeculatable]>;
178178

179-
// TODO: Replace these intrinsics with normal ISel patterns once the
180-
// pmin/pmax instructions are merged to the spec proposal.
179+
// TODO: Replace these intrinsics with normal ISel patterns
181180
def int_wasm_pmin :
182181
Intrinsic<[llvm_anyvector_ty],
183182
[LLVMMatchType<0>, LLVMMatchType<0>],
@@ -187,6 +186,26 @@ def int_wasm_pmax :
187186
[LLVMMatchType<0>, LLVMMatchType<0>],
188187
[IntrNoMem, IntrSpeculatable]>;
189188

189+
// TODO: Replace these instrinsics with normal ISel patterns once the
190+
// rounding instructions are merged to the proposal
191+
// (https://github.com/WebAssembly/simd/pull/232).
192+
def int_wasm_ceil :
193+
Intrinsic<[llvm_anyvector_ty],
194+
[LLVMMatchType<0>],
195+
[IntrNoMem, IntrSpeculatable]>;
196+
def int_wasm_floor :
197+
Intrinsic<[llvm_anyvector_ty],
198+
[LLVMMatchType<0>],
199+
[IntrNoMem, IntrSpeculatable]>;
200+
def int_wasm_trunc :
201+
Intrinsic<[llvm_anyvector_ty],
202+
[LLVMMatchType<0>],
203+
[IntrNoMem, IntrSpeculatable]>;
204+
def int_wasm_nearest :
205+
Intrinsic<[llvm_anyvector_ty],
206+
[LLVMMatchType<0>],
207+
[IntrNoMem, IntrSpeculatable]>;
208+
190209
//===----------------------------------------------------------------------===//
191210
// Bulk memory intrinsics
192211
//===----------------------------------------------------------------------===//

‎llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -765,6 +765,16 @@ defm NEG : SIMDUnaryFP<fneg, "neg", 225>;
765765
// Square root: sqrt
766766
defm SQRT : SIMDUnaryFP<fsqrt, "sqrt", 227>;
767767

768+
// Rounding: ceil, floor, trunc, nearest
769+
defm CEIL : SIMDUnary<v4f32, "f32x4", int_wasm_ceil, "ceil", 216>;
770+
defm FLOOR : SIMDUnary<v4f32, "f32x4", int_wasm_floor, "floor", 217>;
771+
defm TRUNC: SIMDUnary<v4f32, "f32x4", int_wasm_trunc, "trunc", 218>;
772+
defm NEAREST: SIMDUnary<v4f32, "f32x4", int_wasm_nearest, "nearest", 219>;
773+
defm CEIL : SIMDUnary<v2f64, "f64x2", int_wasm_ceil, "ceil", 220>;
774+
defm FLOOR : SIMDUnary<v2f64, "f64x2", int_wasm_floor, "floor", 221>;
775+
defm TRUNC: SIMDUnary<v2f64, "f64x2", int_wasm_trunc, "trunc", 222>;
776+
defm NEAREST: SIMDUnary<v2f64, "f64x2", int_wasm_nearest, "nearest", 223>;
777+
768778
//===----------------------------------------------------------------------===//
769779
// Floating-point binary arithmetic
770780
//===----------------------------------------------------------------------===//

‎llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll

Lines changed: 80 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -521,6 +521,46 @@ define <4 x float> @pmax_v4f32(<4 x float> %a, <4 x float> %b) {
521521
ret <4 x float> %v
522522
}
523523

524+
; CHECK-LABEL: ceil_v4f32:
525+
; SIMD128-NEXT: .functype ceil_v4f32 (v128) -> (v128){{$}}
526+
; SIMD128-NEXT: f32x4.ceil $push[[R:[0-9]+]]=, $0{{$}}
527+
; SIMD128-NEXT: return $pop[[R]]{{$}}
528+
declare <4 x float> @llvm.wasm.ceil.v4f32(<4 x float>)
529+
define <4 x float> @ceil_v4f32(<4 x float> %a) {
530+
%v = call <4 x float> @llvm.wasm.ceil.v4f32(<4 x float> %a)
531+
ret <4 x float> %v
532+
}
533+
534+
; CHECK-LABEL: floor_v4f32:
535+
; SIMD128-NEXT: .functype floor_v4f32 (v128) -> (v128){{$}}
536+
; SIMD128-NEXT: f32x4.floor $push[[R:[0-9]+]]=, $0{{$}}
537+
; SIMD128-NEXT: return $pop[[R]]{{$}}
538+
declare <4 x float> @llvm.wasm.floor.v4f32(<4 x float>)
539+
define <4 x float> @floor_v4f32(<4 x float> %a) {
540+
%v = call <4 x float> @llvm.wasm.floor.v4f32(<4 x float> %a)
541+
ret <4 x float> %v
542+
}
543+
544+
; CHECK-LABEL: trunc_v4f32:
545+
; SIMD128-NEXT: .functype trunc_v4f32 (v128) -> (v128){{$}}
546+
; SIMD128-NEXT: f32x4.trunc $push[[R:[0-9]+]]=, $0{{$}}
547+
; SIMD128-NEXT: return $pop[[R]]{{$}}
548+
declare <4 x float> @llvm.wasm.trunc.v4f32(<4 x float>)
549+
define <4 x float> @trunc_v4f32(<4 x float> %a) {
550+
%v = call <4 x float> @llvm.wasm.trunc.v4f32(<4 x float> %a)
551+
ret <4 x float> %v
552+
}
553+
554+
; CHECK-LABEL: nearest_v4f32:
555+
; SIMD128-NEXT: .functype nearest_v4f32 (v128) -> (v128){{$}}
556+
; SIMD128-NEXT: f32x4.nearest $push[[R:[0-9]+]]=, $0{{$}}
557+
; SIMD128-NEXT: return $pop[[R]]{{$}}
558+
declare <4 x float> @llvm.wasm.nearest.v4f32(<4 x float>)
559+
define <4 x float> @nearest_v4f32(<4 x float> %a) {
560+
%v = call <4 x float> @llvm.wasm.nearest.v4f32(<4 x float> %a)
561+
ret <4 x float> %v
562+
}
563+
524564
; CHECK-LABEL: qfma_v4f32:
525565
; SIMD128-NEXT: .functype qfma_v4f32 (v128, v128, v128) -> (v128){{$}}
526566
; SIMD128-NEXT: f32x4.qfma $push[[R:[0-9]+]]=, $0, $1, $2{{$}}
@@ -580,6 +620,46 @@ define <2 x double> @pmax_v2f64(<2 x double> %a, <2 x double> %b) {
580620
ret <2 x double> %v
581621
}
582622

623+
; CHECK-LABEL: ceil_v2f64:
624+
; SIMD128-NEXT: .functype ceil_v2f64 (v128) -> (v128){{$}}
625+
; SIMD128-NEXT: f64x2.ceil $push[[R:[0-9]+]]=, $0{{$}}
626+
; SIMD128-NEXT: return $pop[[R]]{{$}}
627+
declare <2 x double> @llvm.wasm.ceil.v2f64(<2 x double>)
628+
define <2 x double> @ceil_v2f64(<2 x double> %a) {
629+
%v = call <2 x double> @llvm.wasm.ceil.v2f64(<2 x double> %a)
630+
ret <2 x double> %v
631+
}
632+
633+
; CHECK-LABEL: floor_v2f64:
634+
; SIMD128-NEXT: .functype floor_v2f64 (v128) -> (v128){{$}}
635+
; SIMD128-NEXT: f64x2.floor $push[[R:[0-9]+]]=, $0{{$}}
636+
; SIMD128-NEXT: return $pop[[R]]{{$}}
637+
declare <2 x double> @llvm.wasm.floor.v2f64(<2 x double>)
638+
define <2 x double> @floor_v2f64(<2 x double> %a) {
639+
%v = call <2 x double> @llvm.wasm.floor.v2f64(<2 x double> %a)
640+
ret <2 x double> %v
641+
}
642+
643+
; CHECK-LABEL: trunc_v2f64:
644+
; SIMD128-NEXT: .functype trunc_v2f64 (v128) -> (v128){{$}}
645+
; SIMD128-NEXT: f64x2.trunc $push[[R:[0-9]+]]=, $0{{$}}
646+
; SIMD128-NEXT: return $pop[[R]]{{$}}
647+
declare <2 x double> @llvm.wasm.trunc.v2f64(<2 x double>)
648+
define <2 x double> @trunc_v2f64(<2 x double> %a) {
649+
%v = call <2 x double> @llvm.wasm.trunc.v2f64(<2 x double> %a)
650+
ret <2 x double> %v
651+
}
652+
653+
; CHECK-LABEL: nearest_v2f64:
654+
; SIMD128-NEXT: .functype nearest_v2f64 (v128) -> (v128){{$}}
655+
; SIMD128-NEXT: f64x2.nearest $push[[R:[0-9]+]]=, $0{{$}}
656+
; SIMD128-NEXT: return $pop[[R]]{{$}}
657+
declare <2 x double> @llvm.wasm.nearest.v2f64(<2 x double>)
658+
define <2 x double> @nearest_v2f64(<2 x double> %a) {
659+
%v = call <2 x double> @llvm.wasm.nearest.v2f64(<2 x double> %a)
660+
ret <2 x double> %v
661+
}
662+
583663
; CHECK-LABEL: qfma_v2f64:
584664
; SIMD128-NEXT: .functype qfma_v2f64 (v128, v128, v128) -> (v128){{$}}
585665
; SIMD128-NEXT: f64x2.qfma $push[[R:[0-9]+]]=, $0, $1, $2{{$}}

‎llvm/test/MC/WebAssembly/simd-encodings.s

Lines changed: 24 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -508,6 +508,30 @@ main:
508508
# CHECK: i64x2.mul # encoding: [0xfd,0xd5,0x01]
509509
i64x2.mul
510510

511+
# CHECK: f32x4.ceil # encoding: [0xfd,0xd8,0x01]
512+
f32x4.ceil
513+
514+
# CHECK: f32x4.floor # encoding: [0xfd,0xd9,0x01]
515+
f32x4.floor
516+
517+
# CHECK: f32x4.trunc # encoding: [0xfd,0xda,0x01]
518+
f32x4.trunc
519+
520+
# CHECK: f32x4.nearest # encoding: [0xfd,0xdb,0x01]
521+
f32x4.nearest
522+
523+
# CHECK: f64x2.ceil # encoding: [0xfd,0xdc,0x01]
524+
f64x2.ceil
525+
526+
# CHECK: f64x2.floor # encoding: [0xfd,0xdd,0x01]
527+
f64x2.floor
528+
529+
# CHECK: f64x2.trunc # encoding: [0xfd,0xde,0x01]
530+
f64x2.trunc
531+
532+
# CHECK: f64x2.nearest # encoding: [0xfd,0xdf,0x01]
533+
f64x2.nearest
534+
511535
# CHECK: f32x4.abs # encoding: [0xfd,0xe0,0x01]
512536
f32x4.abs
513537

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