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1 parent b249611 commit ad05d05Copy full SHA for ad05d05
llvm/lib/Target/AMDGPU/AMDGPUCombine.td
@@ -205,10 +205,9 @@ def AMDGPUPostLegalizerCombiner: GICombiner<
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def AMDGPURegBankCombiner : GICombiner<
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"AMDGPURegBankCombinerImpl",
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- [unmerge_merge, unmerge_cst, unmerge_undef,
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- zext_trunc_fold, int_minmax_to_med3, ptr_add_immed_chain,
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- fp_minmax_to_clamp, fp_minmax_to_med3, fmed3_intrinsic_to_clamp,
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- identity_combines, redundant_and, constant_fold_cast_op,
+ [unmerge_merge, unmerge_cst, unmerge_undef, int_minmax_to_med3,
+ ptr_add_immed_chain, fp_minmax_to_clamp, fp_minmax_to_med3,
+ fmed3_intrinsic_to_clamp, identity_combines, constant_fold_cast_op,
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cast_of_cast_combines, sext_trunc, zext_of_shift_amount_combines,
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lower_uniform_sbfx, lower_uniform_ubfx, form_bitfield_extract,
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known_bits_simplifications]> {
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