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[VPlan] Add test for printing FOR with live-out.
Add additional test coverage for printing VPlans with a first-order recurrence with its result used outside the loop.
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llvm/test/Transforms/LoopVectorize/vplan-printing.ll

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@@ -882,6 +882,58 @@ exit:
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ret void
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}
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define i16 @print_first_order_recurrence_and_result(ptr %ptr) {
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; CHECK-LABEL: 'print_first_order_recurrence_and_result'
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; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
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; CHECK-NEXT: Live-in vp<[[VFxUF:%.+]]> = VF * UF
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; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
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; CHECK-NEXT: Live-in ir<1000> = original trip-count
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; CHECK-EMPTY:
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; CHECK-NEXT: vector.ph:
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; CHECK-NEXT: Successor(s): vector loop
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; CHECK-EMPTY:
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; CHECK-NEXT: <x1> vector loop: {
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; CHECK-NEXT: vector.body:
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; CHECK-NEXT: EMIT vp<[[CAN_IV:%.+]]> = CANONICAL-INDUCTION
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; CHECK-NEXT: FIRST-ORDER-RECURRENCE-PHI ir<%for.1> = phi ir<22>, ir<%for.1.next>
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; CHECK-NEXT: vp<[[STEPS:%.+]]> = SCALAR-STEPS vp<[[CAN_IV]]>, ir<1>
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; CHECK-NEXT: CLONE ir<%gep.ptr> = getelementptr inbounds ir<%ptr>, vp<[[STEPS]]>
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; CHECK-NEXT: vp<[[VEC_PTR:%.+]]> = vector-pointer ir<%gep.ptr>
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; CHECK-NEXT: WIDEN ir<%for.1.next> = load vp<[[VEC_PTR]]>
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; CHECK-NEXT: EMIT vp<[[FOR1_SPLICE:%.+]]> = first-order splice ir<%for.1>, ir<%for.1.next>
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; CHECK-NEXT: WIDEN ir<%add> = add vp<[[FOR1_SPLICE]]>, ir<1>
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; CHECK-NEXT: vp<[[VEC_PTR2:%.+]]> = vector-pointer ir<%gep.ptr>
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; CHECK-NEXT: WIDEN store vp<[[VEC_PTR2]]>, ir<%add>
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; CHECK-NEXT: EMIT vp<[[CAN_IV_NEXT:%.+]]> = add nuw vp<[[CAN_IV]]>, vp<[[VFxUF]]>
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; CHECK-NEXT: EMIT branch-on-count vp<[[CAN_IV_NEXT]]>, vp<[[VTC]]>
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; CHECK-NEXT: No successors
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; CHECK-NEXT: }
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; CHECK-NEXT: Successor(s): middle.block
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; CHECK-EMPTY:
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; CHECK-NEXT: middle.block:
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; CHECK-NEXT: No successors
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; CHECK-EMPTY:
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; CHECK-NEXT: Live-out i16 %for.1.lcssa = vp<[[FOR1_SPLICE]]>
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; CHECK-NEXT: }
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;
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entry:
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br label %loop
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loop:
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%for.1 = phi i16 [ 22, %entry ], [ %for.1.next, %loop ]
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%iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
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%iv.next = add nuw nsw i64 %iv, 1
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%gep.ptr = getelementptr inbounds i16, ptr %ptr, i64 %iv
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%for.1.next = load i16, ptr %gep.ptr, align 2
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%add = add i16 %for.1, 1
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store i16 %add, ptr %gep.ptr
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%exitcond.not = icmp eq i64 %iv.next, 1000
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br i1 %exitcond.not, label %exit, label %loop
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exit:
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ret i16 %for.1
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}
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!llvm.dbg.cu = !{!0}
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!llvm.module.flags = !{!3, !4}
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