@@ -1645,6 +1645,54 @@ define i32 @test_umin_sub1_nuw(i32 %x, i32 range(i32 1, 0) %w) {
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ret i32 %r
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}
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+ define i32 @test_smin_sub1_nsw_swapped (i32 %x , i32 %w ) {
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+ ; CHECK-LABEL: @test_smin_sub1_nsw_swapped(
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+ ; CHECK-NEXT: [[SUB:%.*]] = add nsw i32 [[W:%.*]], -1
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+ ; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smin.i32(i32 [[X:%.*]], i32 [[SUB]])
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+ ; CHECK-NEXT: ret i32 [[R]]
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+ ;
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+ %cmp = icmp sgt i32 %w , %x
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+ %sub = add nsw i32 %w , -1
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+ %r = select i1 %cmp , i32 %x , i32 %sub
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+ ret i32 %r
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+ }
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+
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+ define i32 @test_smax_add1_nsw_swapped (i32 %x , i32 %w ) {
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+ ; CHECK-LABEL: @test_smax_add1_nsw_swapped(
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+ ; CHECK-NEXT: [[X2:%.*]] = add nsw i32 [[W:%.*]], 1
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+ ; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.smax.i32(i32 [[X:%.*]], i32 [[X2]])
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+ ; CHECK-NEXT: ret i32 [[R]]
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+ ;
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+ %cmp = icmp slt i32 %w , %x
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+ %add = add nsw i32 %w , 1
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+ %r = select i1 %cmp , i32 %x , i32 %add
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+ ret i32 %r
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+ }
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+
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+ define i32 @test_umax_add1_nuw_swapped (i32 %x , i32 %w ) {
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+ ; CHECK-LABEL: @test_umax_add1_nuw_swapped(
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+ ; CHECK-NEXT: [[ADD:%.*]] = add nuw i32 [[W:%.*]], 1
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+ ; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umax.i32(i32 [[X:%.*]], i32 [[ADD]])
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+ ; CHECK-NEXT: ret i32 [[R]]
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+ ;
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+ %cmp = icmp ult i32 %w , %x
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+ %add = add nuw i32 %w , 1
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+ %r = select i1 %cmp , i32 %x , i32 %add
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+ ret i32 %r
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+ }
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+
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+ define i32 @test_umin_sub1_nuw_swapped (i32 %x , i32 range(i32 1 , 0 ) %w ) {
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+ ; CHECK-LABEL: @test_umin_sub1_nuw_swapped(
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+ ; CHECK-NEXT: [[SUB:%.*]] = add i32 [[W:%.*]], -1
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+ ; CHECK-NEXT: [[R:%.*]] = call i32 @llvm.umin.i32(i32 [[X:%.*]], i32 [[SUB]])
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+ ; CHECK-NEXT: ret i32 [[R]]
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+ ;
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+ %cmp = icmp ugt i32 %w , %x
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+ %sub = add i32 %w , -1
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+ %r = select i1 %cmp , i32 %x , i32 %sub
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+ ret i32 %r
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+ }
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+
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define <2 x i16 > @test_smin_sub1_nsw_vec (<2 x i16 > %x , <2 x i16 > %w ) {
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; CHECK-LABEL: @test_smin_sub1_nsw_vec(
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; CHECK-NEXT: [[SUB:%.*]] = add nsw <2 x i16> [[W:%.*]], splat (i16 -1)
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