[MIPS] Fix miscompiles consecutive half operations

Use softPromoteHalf legalization for fp16 rather than PromoteFloat. Fix #97975.
llvm · Sep 27, 2024 · a618b49 · a618b49
1 parent 9b5a303
commit a618b49
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diff --git a/llvm/lib/Target/Mips/MipsISelLowering.h b/llvm/lib/Target/Mips/MipsISelLowering.h
@@ -365,6 +365,8 @@ class TargetRegisterClass;
       return ABI.IsN64() ? Mips::A1_64 : Mips::A1;
     }
 
+    bool softPromoteHalfType() const override { return true; }
+
     bool isJumpTableRelative() const override {
       return getTargetMachine().isPositionIndependent();
     }

diff --git a/llvm/test/CodeGen/Mips/fp16-promote.ll b/llvm/test/CodeGen/Mips/fp16-promote.ll
@@ -62,8 +62,8 @@ define <4 x float> @test_vec_fpext_float(ptr %p) #0 {
 ; CHECK-LIBCALL-LABEL: test_vec_fpext_double:
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
-; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: cvt.d.s
+; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)
 ; CHECK-LIBCALL: cvt.d.s
 ; CHECK-LIBCALL: cvt.d.s
 ; CHECK-LIBCALL: %call16(__gnu_h2f_ieee)