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topperctopperc
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fixup! after merge
1 parent 5949892 commit a42b358

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3 files changed

+31
-61
lines changed

3 files changed

+31
-61
lines changed

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16302,8 +16302,6 @@ static SDValue combineTruncToVnclip(SDNode *N, SelectionDAG &DAG,
1630216302
else
1630316303
return SDValue();
1630416304

16305-
SDLoc DL(N);
16306-
1630716305
MVT ValVT = Val.getSimpleValueType();
1630816306

1630916307
do {

‎llvm/test/CodeGen/RISCV/rvv/fixed-vectors-trunc-sat-clip.ll

Lines changed: 14 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -448,12 +448,10 @@ define void @trunc_sat_u8u32_maxmin(ptr %x, ptr %y) {
448448
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
449449
; CHECK-NEXT: vle32.v v8, (a0)
450450
; CHECK-NEXT: vmax.vx v8, v8, zero
451-
; CHECK-NEXT: li a0, 255
452-
; CHECK-NEXT: vmin.vx v8, v8, a0
453451
; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
454-
; CHECK-NEXT: vnsrl.wi v8, v8, 0
452+
; CHECK-NEXT: vnclipu.wi v8, v8, 0
455453
; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma
456-
; CHECK-NEXT: vnsrl.wi v8, v8, 0
454+
; CHECK-NEXT: vnclipu.wi v8, v8, 0
457455
; CHECK-NEXT: vse8.v v8, (a1)
458456
; CHECK-NEXT: ret
459457
%1 = load <4 x i32>, ptr %x, align 16
@@ -469,13 +467,11 @@ define void @trunc_sat_u8u32_minmax(ptr %x, ptr %y) {
469467
; CHECK: # %bb.0:
470468
; CHECK-NEXT: vsetivli zero, 4, e32, m1, ta, ma
471469
; CHECK-NEXT: vle32.v v8, (a0)
472-
; CHECK-NEXT: li a0, 255
473-
; CHECK-NEXT: vmin.vx v8, v8, a0
474470
; CHECK-NEXT: vmax.vx v8, v8, zero
475471
; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
476-
; CHECK-NEXT: vnsrl.wi v8, v8, 0
472+
; CHECK-NEXT: vnclipu.wi v8, v8, 0
477473
; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma
478-
; CHECK-NEXT: vnsrl.wi v8, v8, 0
474+
; CHECK-NEXT: vnclipu.wi v8, v8, 0
479475
; CHECK-NEXT: vse8.v v8, (a1)
480476
; CHECK-NEXT: ret
481477
%1 = load <4 x i32>, ptr %x, align 16
@@ -551,14 +547,12 @@ define void @trunc_sat_u8u64_maxmin(ptr %x, ptr %y) {
551547
; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
552548
; CHECK-NEXT: vle64.v v8, (a0)
553549
; CHECK-NEXT: vmax.vx v8, v8, zero
554-
; CHECK-NEXT: li a0, 255
555-
; CHECK-NEXT: vmin.vx v8, v8, a0
556550
; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma
557-
; CHECK-NEXT: vnsrl.wi v10, v8, 0
551+
; CHECK-NEXT: vnclipu.wi v10, v8, 0
558552
; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
559-
; CHECK-NEXT: vnsrl.wi v8, v10, 0
553+
; CHECK-NEXT: vnclipu.wi v8, v10, 0
560554
; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma
561-
; CHECK-NEXT: vnsrl.wi v8, v8, 0
555+
; CHECK-NEXT: vnclipu.wi v8, v8, 0
562556
; CHECK-NEXT: vse8.v v8, (a1)
563557
; CHECK-NEXT: ret
564558
%1 = load <4 x i64>, ptr %x, align 16
@@ -574,15 +568,13 @@ define void @trunc_sat_u8u64_minmax(ptr %x, ptr %y) {
574568
; CHECK: # %bb.0:
575569
; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
576570
; CHECK-NEXT: vle64.v v8, (a0)
577-
; CHECK-NEXT: li a0, 255
578-
; CHECK-NEXT: vmin.vx v8, v8, a0
579571
; CHECK-NEXT: vmax.vx v8, v8, zero
580572
; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma
581-
; CHECK-NEXT: vnsrl.wi v10, v8, 0
573+
; CHECK-NEXT: vnclipu.wi v10, v8, 0
582574
; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
583-
; CHECK-NEXT: vnsrl.wi v8, v10, 0
575+
; CHECK-NEXT: vnclipu.wi v8, v10, 0
584576
; CHECK-NEXT: vsetvli zero, zero, e8, mf4, ta, ma
585-
; CHECK-NEXT: vnsrl.wi v8, v8, 0
577+
; CHECK-NEXT: vnclipu.wi v8, v8, 0
586578
; CHECK-NEXT: vse8.v v8, (a1)
587579
; CHECK-NEXT: ret
588580
%1 = load <4 x i64>, ptr %x, align 16
@@ -674,13 +666,10 @@ define void @trunc_sat_u16u64_maxmin(ptr %x, ptr %y) {
674666
; CHECK-NEXT: vle64.v v8, (a0)
675667
; CHECK-NEXT: li a0, 1
676668
; CHECK-NEXT: vmax.vx v8, v8, a0
677-
; CHECK-NEXT: lui a0, 16
678-
; CHECK-NEXT: addiw a0, a0, -1
679-
; CHECK-NEXT: vmin.vx v8, v8, a0
680669
; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma
681-
; CHECK-NEXT: vnsrl.wi v10, v8, 0
670+
; CHECK-NEXT: vnclipu.wi v10, v8, 0
682671
; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
683-
; CHECK-NEXT: vnsrl.wi v8, v10, 0
672+
; CHECK-NEXT: vnclipu.wi v8, v10, 0
684673
; CHECK-NEXT: vse16.v v8, (a1)
685674
; CHECK-NEXT: ret
686675
%1 = load <4 x i64>, ptr %x, align 16
@@ -696,15 +685,12 @@ define void @trunc_sat_u16u64_minmax(ptr %x, ptr %y) {
696685
; CHECK: # %bb.0:
697686
; CHECK-NEXT: vsetivli zero, 4, e64, m2, ta, ma
698687
; CHECK-NEXT: vle64.v v8, (a0)
699-
; CHECK-NEXT: lui a0, 16
700-
; CHECK-NEXT: addiw a0, a0, -1
701-
; CHECK-NEXT: vmin.vx v8, v8, a0
702688
; CHECK-NEXT: li a0, 50
703689
; CHECK-NEXT: vmax.vx v8, v8, a0
704690
; CHECK-NEXT: vsetvli zero, zero, e32, m1, ta, ma
705-
; CHECK-NEXT: vnsrl.wi v10, v8, 0
691+
; CHECK-NEXT: vnclipu.wi v10, v8, 0
706692
; CHECK-NEXT: vsetvli zero, zero, e16, mf2, ta, ma
707-
; CHECK-NEXT: vnsrl.wi v8, v10, 0
693+
; CHECK-NEXT: vnclipu.wi v8, v10, 0
708694
; CHECK-NEXT: vse16.v v8, (a1)
709695
; CHECK-NEXT: ret
710696
%1 = load <4 x i64>, ptr %x, align 16

‎llvm/test/CodeGen/RISCV/rvv/trunc-sat-clip-sdnode.ll

Lines changed: 17 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -448,12 +448,10 @@ define void @trunc_sat_u8u32_maxmin(ptr %x, ptr %y) {
448448
; CHECK-NEXT: vl2re32.v v8, (a0)
449449
; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
450450
; CHECK-NEXT: vmax.vx v8, v8, zero
451-
; CHECK-NEXT: li a0, 255
452-
; CHECK-NEXT: vmin.vx v8, v8, a0
453451
; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma
454-
; CHECK-NEXT: vnsrl.wi v10, v8, 0
452+
; CHECK-NEXT: vnclipu.wi v10, v8, 0
455453
; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma
456-
; CHECK-NEXT: vnsrl.wi v8, v10, 0
454+
; CHECK-NEXT: vnclipu.wi v8, v10, 0
457455
; CHECK-NEXT: vse8.v v8, (a1)
458456
; CHECK-NEXT: ret
459457
%1 = load <vscale x 4 x i32>, ptr %x, align 16
@@ -468,14 +466,12 @@ define void @trunc_sat_u8u32_minmax(ptr %x, ptr %y) {
468466
; CHECK-LABEL: trunc_sat_u8u32_minmax:
469467
; CHECK: # %bb.0:
470468
; CHECK-NEXT: vl2re32.v v8, (a0)
471-
; CHECK-NEXT: li a0, 255
472-
; CHECK-NEXT: vsetvli a2, zero, e32, m2, ta, ma
473-
; CHECK-NEXT: vmin.vx v8, v8, a0
469+
; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
474470
; CHECK-NEXT: vmax.vx v8, v8, zero
475471
; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma
476-
; CHECK-NEXT: vnsrl.wi v10, v8, 0
472+
; CHECK-NEXT: vnclipu.wi v10, v8, 0
477473
; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma
478-
; CHECK-NEXT: vnsrl.wi v8, v10, 0
474+
; CHECK-NEXT: vnclipu.wi v8, v10, 0
479475
; CHECK-NEXT: vse8.v v8, (a1)
480476
; CHECK-NEXT: ret
481477
%1 = load <vscale x 4 x i32>, ptr %x, align 16
@@ -551,14 +547,12 @@ define void @trunc_sat_u8u64_maxmin(ptr %x, ptr %y) {
551547
; CHECK-NEXT: vl4re64.v v8, (a0)
552548
; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
553549
; CHECK-NEXT: vmax.vx v8, v8, zero
554-
; CHECK-NEXT: li a0, 255
555-
; CHECK-NEXT: vmin.vx v8, v8, a0
556550
; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma
557-
; CHECK-NEXT: vnsrl.wi v12, v8, 0
551+
; CHECK-NEXT: vnclipu.wi v12, v8, 0
558552
; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma
559-
; CHECK-NEXT: vnsrl.wi v8, v12, 0
553+
; CHECK-NEXT: vnclipu.wi v8, v12, 0
560554
; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma
561-
; CHECK-NEXT: vnsrl.wi v8, v8, 0
555+
; CHECK-NEXT: vnclipu.wi v8, v8, 0
562556
; CHECK-NEXT: vse8.v v8, (a1)
563557
; CHECK-NEXT: ret
564558
%1 = load <vscale x 4 x i64>, ptr %x, align 16
@@ -573,16 +567,14 @@ define void @trunc_sat_u8u64_minmax(ptr %x, ptr %y) {
573567
; CHECK-LABEL: trunc_sat_u8u64_minmax:
574568
; CHECK: # %bb.0:
575569
; CHECK-NEXT: vl4re64.v v8, (a0)
576-
; CHECK-NEXT: li a0, 255
577-
; CHECK-NEXT: vsetvli a2, zero, e64, m4, ta, ma
578-
; CHECK-NEXT: vmin.vx v8, v8, a0
570+
; CHECK-NEXT: vsetvli a0, zero, e64, m4, ta, ma
579571
; CHECK-NEXT: vmax.vx v8, v8, zero
580572
; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma
581-
; CHECK-NEXT: vnsrl.wi v12, v8, 0
573+
; CHECK-NEXT: vnclipu.wi v12, v8, 0
582574
; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma
583-
; CHECK-NEXT: vnsrl.wi v8, v12, 0
575+
; CHECK-NEXT: vnclipu.wi v8, v12, 0
584576
; CHECK-NEXT: vsetvli zero, zero, e8, mf2, ta, ma
585-
; CHECK-NEXT: vnsrl.wi v8, v8, 0
577+
; CHECK-NEXT: vnclipu.wi v8, v8, 0
586578
; CHECK-NEXT: vse8.v v8, (a1)
587579
; CHECK-NEXT: ret
588580
%1 = load <vscale x 4 x i64>, ptr %x, align 16
@@ -653,13 +645,10 @@ define void @trunc_sat_u16u64_maxmin(ptr %x, ptr %y) {
653645
; CHECK-NEXT: li a0, 1
654646
; CHECK-NEXT: vsetvli a2, zero, e64, m4, ta, ma
655647
; CHECK-NEXT: vmax.vx v8, v8, a0
656-
; CHECK-NEXT: lui a0, 16
657-
; CHECK-NEXT: addiw a0, a0, -1
658-
; CHECK-NEXT: vmin.vx v8, v8, a0
659648
; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma
660-
; CHECK-NEXT: vnsrl.wi v12, v8, 0
649+
; CHECK-NEXT: vnclipu.wi v12, v8, 0
661650
; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma
662-
; CHECK-NEXT: vnsrl.wi v8, v12, 0
651+
; CHECK-NEXT: vnclipu.wi v8, v12, 0
663652
; CHECK-NEXT: vs1r.v v8, (a1)
664653
; CHECK-NEXT: ret
665654
%1 = load <vscale x 4 x i64>, ptr %x, align 16
@@ -674,16 +663,13 @@ define void @trunc_sat_u16u64_minmax(ptr %x, ptr %y) {
674663
; CHECK-LABEL: trunc_sat_u16u64_minmax:
675664
; CHECK: # %bb.0:
676665
; CHECK-NEXT: vl4re64.v v8, (a0)
677-
; CHECK-NEXT: lui a0, 16
678-
; CHECK-NEXT: addiw a0, a0, -1
679-
; CHECK-NEXT: vsetvli a2, zero, e64, m4, ta, ma
680-
; CHECK-NEXT: vmin.vx v8, v8, a0
681666
; CHECK-NEXT: li a0, 50
667+
; CHECK-NEXT: vsetvli a2, zero, e64, m4, ta, ma
682668
; CHECK-NEXT: vmax.vx v8, v8, a0
683669
; CHECK-NEXT: vsetvli zero, zero, e32, m2, ta, ma
684-
; CHECK-NEXT: vnsrl.wi v12, v8, 0
670+
; CHECK-NEXT: vnclipu.wi v12, v8, 0
685671
; CHECK-NEXT: vsetvli zero, zero, e16, m1, ta, ma
686-
; CHECK-NEXT: vnsrl.wi v8, v12, 0
672+
; CHECK-NEXT: vnclipu.wi v8, v12, 0
687673
; CHECK-NEXT: vs1r.v v8, (a1)
688674
; CHECK-NEXT: ret
689675
%1 = load <vscale x 4 x i64>, ptr %x, align 16

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