[ARM] Skip storing of stack arguments when lowering tail calls

guy-david · guy-david · commit 9a6844c80b6e · 2025-02-17T01:20:39.000+02:00
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -2422,6 +2422,45 @@ static bool canGuaranteeTCO(CallingConv::ID CC, bool GuaranteeTailCalls) {
          CC == CallingConv::Tail || CC == CallingConv::SwiftTail;
 }
 
+/// Check whether a stack argument requires lowering in a tail call.
+static bool shouldLowerTailCallStackArg(const MachineFunction &MF,
+                                        const CCValAssign &VA, SDValue Arg,
+                                        ISD::ArgFlagsTy Flags, int CallOffset) {
+  // FIXME: We should be able to handle this case, but it's not clear how to.
+  if (Flags.isZExt() || Flags.isSExt())
+    return true;
+
+  for (;;) {
+    // Look through nodes that don't alter the bits of the incoming value.
+    unsigned Op = Arg.getOpcode();
+    if (Op == ISD::ZERO_EXTEND || Op == ISD::ANY_EXTEND || Op == ISD::BITCAST ||
+        Op == ISD::AssertZext || Op == ISD::AssertSext) {
+      Arg = Arg.getOperand(0);
+      continue;
+    }
+    break;
+  }
+
+  // If the argument is a load from the same immutable stack slot, we can reuse
+  // it.
+  if (auto *LoadNode = dyn_cast<LoadSDNode>(Arg)) {
+    if (auto *FINode = dyn_cast<FrameIndexSDNode>(LoadNode->getBasePtr())) {
+      const MachineFrameInfo &MFI = MF.getFrameInfo();
+      int FI = FINode->getIndex();
+      if (!MFI.isImmutableObjectIndex(FI))
+        return true;
+      if (CallOffset != MFI.getObjectOffset(FI))
+        return true;
+      uint64_t SizeInBits = LoadNode->getMemoryVT().getFixedSizeInBits();
+      if (SizeInBits / 8 != MFI.getObjectSize(FI))
+        return true;
+      return false;
+    }
+  }
+
+  return true;
+}
+
 /// LowerCall - Lowering a call into a callseq_start <-
 /// ARMISD:CALL <- callseq_end chain. Also add input and output parameter
 /// nodes.
@@ -2783,6 +2822,13 @@ ARMTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
       }
     } else {
       assert(VA.isMemLoc());
+
+      // When the frame pointer is perfectly aligned for the tail call and the
+      // same stack argument is passed down intact, we can reuse it.
+      if (!SPDiff && !shouldLowerTailCallStackArg(MF, VA, Arg, Flags,
+                                                  VA.getLocMemOffset()))
+        continue;
+
       SDValue DstAddr;
       MachinePointerInfo DstInfo;
       std::tie(DstAddr, DstInfo) =
diff --git a/llvm/test/CodeGen/ARM/debug-frame.ll b/llvm/test/CodeGen/ARM/debug-frame.ll
@@ -175,7 +175,7 @@ declare void @_ZSt9terminatev()
 ; CHECK-FP:   .cfi_offset r4, -36
 ; CHECK-FP:   add    r11, sp, #28
 ; CHECK-FP:   .cfi_def_cfa r11, 8
-; CHECK-FP:   sub    sp, sp, #44
+; CHECK-FP:   sub    sp, sp, #36
 ; CHECK-FP:   .cfi_endproc
 
 ; CHECK-FP-ELIM-LABEL: _Z4testiiiiiddddd:
@@ -240,7 +240,7 @@ declare void @_ZSt9terminatev()
 ; CHECK-THUMB-FP:   .cfi_offset r4, -20
 ; CHECK-THUMB-FP:   add    r7, sp, #12
 ; CHECK-THUMB-FP:   .cfi_def_cfa r7, 8
-; CHECK-THUMB-FP:   sub    sp, #60
+; CHECK-THUMB-FP:   sub    sp, #52
 ; CHECK-THUMB-FP:   .cfi_endproc
 
 ; CHECK-THUMB-FP-ELIM-LABEL: _Z4testiiiiiddddd:
diff --git a/llvm/test/CodeGen/ARM/ehabi.ll b/llvm/test/CodeGen/ARM/ehabi.ll
@@ -167,8 +167,8 @@ declare void @_ZSt9terminatev()
 ; CHECK-FP:   push   {r4, r5, r6, r7, r8, r9, r10, r11, lr}
 ; CHECK-FP:   .setfp r11, sp, #28
 ; CHECK-FP:   add    r11, sp, #28
-; CHECK-FP:   .pad   #44
-; CHECK-FP:   sub    sp, sp, #44
+; CHECK-FP:   .pad   #36
+; CHECK-FP:   sub    sp, sp, #36
 ; CHECK-FP:   .personality __gxx_personality_v0
 ; CHECK-FP:   .handlerdata
 ; CHECK-FP:   .fnend
@@ -226,7 +226,7 @@ declare void @_ZSt9terminatev()
 ; DWARF-FP:    .cfi_offset r4, -36
 ; DWARF-FP:    add r11, sp, #28
 ; DWARF-FP:    .cfi_def_cfa r11, 8
-; DWARF-FP:    sub sp, sp, #44
+; DWARF-FP:    sub sp, sp, #36
 ; DWARF-FP:    sub sp, r11, #28
 ; DWARF-FP:    pop {r4, r5, r6, r7, r8, r9, r10, r11, lr}
 ; DWARF-FP:    mov pc, lr
diff --git a/llvm/test/CodeGen/ARM/fp16-vector-argument.ll b/llvm/test/CodeGen/ARM/fp16-vector-argument.ll
@@ -155,9 +155,7 @@ define void @many_args_test(double, float, i16, <4 x half>, <8 x half>, <8 x hal
 ; SOFT-NEXT:    vld1.64 {d18, d19}, [r12]
 ; SOFT-NEXT:    add r12, sp, #16
 ; SOFT-NEXT:    vmul.f16 q8, q9, q8
-; SOFT-NEXT:    vst1.64 {d16, d17}, [r12]
-; SOFT-NEXT:    vldr d16, [sp]
-; SOFT-NEXT:    vstr d16, [sp]
+; SOFT-NEXT:    vst1.64 {d16, d17}, [r12] 
 ; SOFT-NEXT:    str r3, [sp, #8]
 ; SOFT-NEXT:    b use
 ;
@@ -185,10 +183,8 @@ define void @many_args_test(double, float, i16, <4 x half>, <8 x half>, <8 x hal
 ; SOFTEB-NEXT:    add r12, sp, #16
 ; SOFTEB-NEXT:    vrev64.16 q9, q9
 ; SOFTEB-NEXT:    vmul.f16 q8, q9, q8
-; SOFTEB-NEXT:    vldr d18, [sp]
 ; SOFTEB-NEXT:    vrev64.16 q8, q8
 ; SOFTEB-NEXT:    vst1.64 {d16, d17}, [r12]
-; SOFTEB-NEXT:    vstr d18, [sp]
 ; SOFTEB-NEXT:    str r3, [sp, #8]
 ; SOFTEB-NEXT:    b use
 ;
diff --git a/llvm/test/CodeGen/ARM/tail-call-stack-args.ll b/llvm/test/CodeGen/ARM/tail-call-stack-args.ll
@@ -0,0 +1,63 @@
+; RUN: llc %s -o - | FileCheck %s
+
+; Tail calls which have stack arguments in the same offsets as the caller do not
+; need to load and store the arguments from the stack.
+
+target triple = "armv7"
+
+declare void @func(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i32 %j)
+
+; CHECK-LABEL: wrapper_func:
+define void @wrapper_func(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i32 %j) {
+  ; CHECK: @ %bb.
+  ; CHECK-NEXT: b func
+  tail call void @func(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i32 %j)
+  ret void
+}
+
+; CHECK-LABEL: wrapper_func_zero_arg:
+define void @wrapper_func_zero_arg(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i32 %j) {
+  ; CHECK: @ %bb.
+  ; CHECK-NEXT: mov r12, #0
+  ; CHECK-NEXT: r12, [sp, #20]
+  ; CHECK-NEXT: b func
+  tail call void @func(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i32 0)
+  ret void
+}
+
+; CHECK-LABEL: wrapper_func_overriden_arg:
+define void @wrapper_func_overriden_arg(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i32 %j) {
+  ; CHECK: @ %bb.
+  ; CHECK-NEXT: push {r11, lr}
+  ; CHECK-NEXT: ldr r12, [sp, #24]
+  ; CHECK-NEXT: mov lr, #0
+  ; CHECK-NEXT: str lr, [sp, #24]
+  ; CHECK-NEXT: str r12, [sp, #28]
+  ; CHECK-NEXT: pop {r11, lr}
+  ; CHECK-NEXT: b func
+  tail call void @func(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 0, i32 %i)
+  ret void
+}
+
+declare void @func_i1(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i1 %j)
+
+; CHECK-LABEL: wrapper_func_i1:
+define void @wrapper_func_i1(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i1 %j) {
+  ; CHECK: @ %bb.
+  ; CHECK-NEXT: b func_i1
+  tail call void @func_i1(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i1 %j)
+  ret void
+}
+
+declare void @func_signext_i1(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i1 signext %j)
+
+; FIXME: Support zero/sign-extended stack arguments.
+; CHECK-LABEL: wrapper_func_i8:
+define void @wrapper_func_i8(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i1 signext %j) {
+  ; CHECK: @ %bb.
+  ; CHECK-NEXT: ldr r12, [sp, #20]
+  ; CHECK-NEXT: str r12, [sp, #20]
+  ; CHECK-NEXT: b func_signext_i1
+  tail call void @func_signext_i1(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i1 signext %j)
+  ret void
+}
