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[InstCombine] Address review comments.
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3 files changed

+66
-32
lines changed

3 files changed

+66
-32
lines changed

‎llvm/include/llvm/Analysis/ValueTracking.h

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -259,11 +259,6 @@ struct KnownFPClass {
259259
return (KnownFPClasses & Mask) == fcNone;
260260
}
261261

262-
/// Return true if it's known this can only be one of the mask entries.
263-
bool isKnownOnly(FPClassTest Mask) const {
264-
return (KnownFPClasses & ~Mask) == fcNone;
265-
}
266-
267262
bool isUnknown() const {
268263
return KnownFPClasses == fcAllFlags && !SignBit;
269264
}

‎llvm/lib/Analysis/ValueTracking.cpp

Lines changed: 38 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -1115,31 +1115,52 @@ static void computeKnownBitsFromOperator(const Operator *I,
11151115
// Handle bitcast from floating point to integer.
11161116
if (match(I, m_ElementWiseBitCast(m_Value(V))) &&
11171117
V->getType()->isFPOrFPVectorTy()) {
1118+
Type *FPType = V->getType()->getScalarType();
11181119
KnownFPClass Result = computeKnownFPClass(V, fcAllFlags, Depth + 1, Q);
1120+
FPClassTest FPClasses = Result.KnownFPClasses;
1121+
1122+
if (Result.isKnownNever(fcNormal | fcSubnormal)) {
1123+
Known.Zero.setAllBits();
1124+
Known.One.setAllBits();
1125+
1126+
if (FPClasses & fcSNan) {
1127+
APInt Payload = APInt::getAllOnes(FPType->getScalarSizeInBits());
1128+
Known = Known.intersectWith(KnownBits::makeConstant(
1129+
APFloat::getSNaN(FPType->getFltSemantics()).bitcastToAPInt()));
1130+
Known = Known.intersectWith(KnownBits::makeConstant(
1131+
APFloat::getSNaN(FPType->getFltSemantics(), &Payload)
1132+
.bitcastToAPInt()));
1133+
}
1134+
1135+
if (FPClasses & fcQNan) {
1136+
APInt Payload = APInt::getAllOnes(FPType->getScalarSizeInBits());
1137+
Known = Known.intersectWith(KnownBits::makeConstant(
1138+
APFloat::getQNaN(FPType->getFltSemantics()).bitcastToAPInt()));
1139+
Known = Known.intersectWith(KnownBits::makeConstant(
1140+
APFloat::getQNaN(FPType->getFltSemantics(), &Payload)
1141+
.bitcastToAPInt()));
1142+
}
1143+
1144+
if (FPClasses & fcInf)
1145+
Known = Known.intersectWith(KnownBits::makeConstant(
1146+
APFloat::getInf(FPType->getFltSemantics()).bitcastToAPInt()));
1147+
1148+
if (FPClasses & fcZero)
1149+
Known = Known.intersectWith(KnownBits::makeConstant(
1150+
APInt::getZero(FPType->getScalarSizeInBits())));
1151+
}
1152+
11191153
if (Result.SignBit) {
11201154
if (*Result.SignBit)
11211155
Known.makeNegative();
11221156
else
11231157
Known.makeNonNegative();
1158+
} else {
1159+
Known.Zero.clearSignBit();
1160+
Known.One.clearSignBit();
11241161
}
11251162

1126-
Type *FPType = V->getType()->getScalarType();
1127-
if (FPType->isIEEELikeFPTy()) {
1128-
int MantissaWidth = FPType->getFPMantissaWidth();
1129-
assert(MantissaWidth != -1 && "Invalid mantissa width");
1130-
if (Result.isKnownOnly(fcInf)) {
1131-
Known.Zero.setLowBits(MantissaWidth);
1132-
Known.One.setBits(MantissaWidth, BitWidth - 1);
1133-
} else if (Result.isKnownOnly(fcZero)) {
1134-
Known.Zero.setLowBits(BitWidth - 1);
1135-
} else if (Result.isKnownOnly(fcInf | fcNan)) {
1136-
Known.One.setBits(MantissaWidth, BitWidth - 1);
1137-
} else if (Result.isKnownOnly(fcSubnormal | fcZero)) {
1138-
Known.Zero.setBits(MantissaWidth, BitWidth - 1);
1139-
} else if (Result.isKnownOnly(fcInf | fcZero)) {
1140-
Known.Zero.setLowBits(MantissaWidth);
1141-
}
1142-
}
1163+
assert(!Known.hasConflict() && "Bits known to be one AND zero?");
11431164

11441165
break;
11451166
}

‎llvm/test/Transforms/InstCombine/known-bits.ll

Lines changed: 28 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1430,7 +1430,7 @@ define <2 x i1> @test_sign_pos_vec(<2 x float> %x) {
14301430

14311431
define i32 @test_inf_only(float nofpclass(nan sub norm zero) %x) {
14321432
; CHECK-LABEL: @test_inf_only(
1433-
; CHECK-NEXT: ret i32 2130706432
1433+
; CHECK-NEXT: ret i32 2139095040
14341434
;
14351435
%y = bitcast float %x to i32
14361436
%and = and i32 %y, 2147483647
@@ -1439,7 +1439,7 @@ define i32 @test_inf_only(float nofpclass(nan sub norm zero) %x) {
14391439

14401440
define i16 @test_inf_only_bfloat(bfloat nofpclass(nan sub norm zero) %x) {
14411441
; CHECK-LABEL: @test_inf_only_bfloat(
1442-
; CHECK-NEXT: ret i16 32512
1442+
; CHECK-NEXT: ret i16 32640
14431443
;
14441444
%y = bitcast bfloat %x to i16
14451445
%and = and i16 %y, 32767
@@ -1448,9 +1448,7 @@ define i16 @test_inf_only_bfloat(bfloat nofpclass(nan sub norm zero) %x) {
14481448

14491449
define i128 @test_inf_only_ppc_fp128(ppc_fp128 nofpclass(nan sub norm zero) %x) {
14501450
; CHECK-LABEL: @test_inf_only_ppc_fp128(
1451-
; CHECK-NEXT: [[Y:%.*]] = bitcast ppc_fp128 [[X:%.*]] to i128
1452-
; CHECK-NEXT: [[AND:%.*]] = and i128 [[Y]], 170141183460469231731687303715884105727
1453-
; CHECK-NEXT: ret i128 [[AND]]
1451+
; CHECK-NEXT: ret i128 9218868437227405312
14541452
;
14551453
%y = bitcast ppc_fp128 %x to i128
14561454
%and = and i128 %y, 170141183460469231731687303715884105727
@@ -1468,9 +1466,7 @@ define i32 @test_zero_only(float nofpclass(nan sub norm inf) %x) {
14681466

14691467
define i80 @test_zero_only_non_ieee(x86_fp80 nofpclass(nan sub norm inf) %x) {
14701468
; CHECK-LABEL: @test_zero_only_non_ieee(
1471-
; CHECK-NEXT: [[TMP1:%.*]] = call x86_fp80 @llvm.fabs.f80(x86_fp80 [[X:%.*]])
1472-
; CHECK-NEXT: [[AND:%.*]] = bitcast x86_fp80 [[TMP1]] to i80
1473-
; CHECK-NEXT: ret i80 [[AND]]
1469+
; CHECK-NEXT: ret i80 0
14741470
;
14751471
%y = bitcast x86_fp80 %x to i80
14761472
%and = and i80 %y, 604462909807314587353087
@@ -1488,7 +1484,9 @@ define i32 @test_inf_nan_only(float nofpclass(sub norm zero) %x) {
14881484

14891485
define i32 @test_sub_zero_only(float nofpclass(nan norm inf) %x) {
14901486
; CHECK-LABEL: @test_sub_zero_only(
1491-
; CHECK-NEXT: ret i32 0
1487+
; CHECK-NEXT: [[Y:%.*]] = bitcast float [[X:%.*]] to i32
1488+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], 2130706432
1489+
; CHECK-NEXT: ret i32 [[AND]]
14921490
;
14931491
%y = bitcast float %x to i32
14941492
%and = and i32 %y, 2130706432
@@ -1497,7 +1495,9 @@ define i32 @test_sub_zero_only(float nofpclass(nan norm inf) %x) {
14971495

14981496
define i32 @test_inf_zero_only(float nofpclass(nan norm sub) %x) {
14991497
; CHECK-LABEL: @test_inf_zero_only(
1500-
; CHECK-NEXT: ret i32 0
1498+
; CHECK-NEXT: [[Y:%.*]] = bitcast float [[X:%.*]] to i32
1499+
; CHECK-NEXT: [[AND:%.*]] = and i32 [[Y]], 8388608
1500+
; CHECK-NEXT: ret i32 [[AND]]
15011501
;
15021502
%y = bitcast float %x to i32
15031503
%and = and i32 %y, 16777215
@@ -1568,5 +1568,23 @@ if.else:
15681568
ret i1 false
15691569
}
15701570

1571+
define i32 @test_snan_only(float nofpclass(qnan sub norm zero inf) %x) {
1572+
; CHECK-LABEL: @test_snan_only(
1573+
; CHECK-NEXT: ret i32 0
1574+
;
1575+
%y = bitcast float %x to i32
1576+
%and = and i32 %y, 4194304
1577+
ret i32 %and
1578+
}
1579+
1580+
define i32 @test_qnan_only(float nofpclass(snan sub norm zero inf) %x) {
1581+
; CHECK-LABEL: @test_qnan_only(
1582+
; CHECK-NEXT: ret i32 4194304
1583+
;
1584+
%y = bitcast float %x to i32
1585+
%and = and i32 %y, 4194304
1586+
ret i32 %and
1587+
}
1588+
15711589
declare void @use(i1)
15721590
declare void @sink(i8)

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