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LiqinWengLiqinWeng
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fix the comments
1 parent 7cc3734 commit 8bcac22

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4 files changed

+20
-18
lines changed

4 files changed

+20
-18
lines changed

‎llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -993,6 +993,8 @@ InstructionCost VPWidenIntrinsicRecipe::computeCost(ElementCount VF,
993993
for (const auto &[Idx, Op] : enumerate(operands())) {
994994
auto *V = Op->getUnderlyingValue();
995995
if (!V) {
996+
// Push all the VP Intrinsic's ops into the Argments even if is nullptr.
997+
// Some VP Intrinsic's cost will assert the number of parameters.
996998
if (VPIntrinsic::isVPIntrinsic(VectorIntrinsicID)) {
997999
Arguments.push_back(V);
9981000
break;

‎llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1490,13 +1490,13 @@ static void transformRecipestoEVLRecipes(VPlan &Plan, VPValue &EVL) {
14901490
return nullptr;
14911491

14921492
SmallVector<VPValue *> Ops(CInst->operands());
1493-
if (VPIntrinsic::getMaskParamPos(VPID)) {
1494-
VPValue *Mask = Plan.getOrAddLiveIn(ConstantInt::getTrue(
1495-
IntegerType::getInt1Ty(CI->getContext())));
1496-
Ops.push_back(Mask);
1497-
}
1498-
if (VPIntrinsic::getVectorLengthParamPos(VPID))
1499-
Ops.push_back(&EVL);
1493+
assert(VPIntrinsic::getMaskParamPos(VPID) &&
1494+
VPIntrinsic::getVectorLengthParamPos(VPID) &&
1495+
"Expected VP intrinsic");
1496+
VPValue *Mask = Plan.getOrAddLiveIn(ConstantInt::getTrue(
1497+
IntegerType::getInt1Ty(CI->getContext())));
1498+
Ops.push_back(Mask);
1499+
Ops.push_back(&EVL);
15001500
return new VPWidenIntrinsicRecipe(
15011501
*CI, VPID, Ops, TypeInfo.inferScalarType(CInst),
15021502
CInst->getDebugLoc());

‎llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1726,9 +1726,9 @@ define float @fmuladd(ptr %a, ptr %b, i64 %n, float %start) {
17261726
; IF-EVL-NEXT: [[VP_OP_LOAD:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP13]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]])
17271727
; IF-EVL-NEXT: [[TMP14:%.*]] = getelementptr inbounds float, ptr [[B:%.*]], i64 [[TMP11]]
17281728
; IF-EVL-NEXT: [[TMP15:%.*]] = getelementptr inbounds float, ptr [[TMP14]], i32 0
1729-
; IF-EVL-NEXT: [[VP_OP_LOAD1:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP15]], <vscale x 4 x i1> splat (i1 true), i32 [[TMP10]])
1730-
; IF-EVL-NEXT: [[TMP16:%.*]] = call reassoc <vscale x 4 x float> @llvm.fmuladd.nxv4f32(<vscale x 4 x float> [[VP_OP_LOAD]], <vscale x 4 x float> [[VP_OP_LOAD1]], <vscale x 4 x float> [[VEC_PHI]])
1731-
; IF-EVL-NEXT: [[TMP17]] = call <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1> splat (i1 true), <vscale x 4 x float> [[TMP16]], <vscale x 4 x float> [[VEC_PHI]], i32 [[TMP10]])
1729+
; IF-EVL-NEXT: [[VP_OP_LOAD1:%.*]] = call <vscale x 4 x float> @llvm.vp.load.nxv4f32.p0(ptr align 4 [[TMP15]], <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), i32 [[TMP10]])
1730+
; IF-EVL-NEXT: [[TMP16:%.*]] = call reassoc <vscale x 4 x float> @llvm.vp.fmuladd.nxv4f32(<vscale x 4 x float> [[VP_OP_LOAD]], <vscale x 4 x float> [[VP_OP_LOAD1]], <vscale x 4 x float> [[VEC_PHI]], <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), i32 [[TMP10]])
1731+
; IF-EVL-NEXT: [[TMP17]] = call <vscale x 4 x float> @llvm.vp.merge.nxv4f32(<vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), <vscale x 4 x float> [[TMP16]], <vscale x 4 x float> [[VEC_PHI]], i32 [[TMP10]])
17321732
; IF-EVL-NEXT: [[TMP18:%.*]] = zext i32 [[TMP10]] to i64
17331733
; IF-EVL-NEXT: [[INDEX_EVL_NEXT]] = add i64 [[TMP18]], [[EVL_BASED_IV]]
17341734
; IF-EVL-NEXT: [[INDEX_NEXT]] = add i64 [[INDEX]], [[TMP8]]

‎llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-call-intrinsics.ll‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
; RUN: -prefer-predicate-over-epilogue=predicate-dont-vectorize \
66
; RUN: -mtriple=riscv64 -mattr=+v -riscv-v-vector-bits-max=128 -disable-output < %s 2>&1 | FileCheck --check-prefix=IF-EVL %s
77

8-
define void @vp_smax(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
8+
define void @vp_smax(ptr %a, ptr %b, ptr %c, i64 %N) {
99
; IF-EVL: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF={1}' {
1010
; IF-EVL-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF
1111
; IF-EVL-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count
@@ -58,7 +58,7 @@ exit:
5858
ret void
5959
}
6060

61-
define void @vp_smin(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
61+
define void @vp_smin(ptr %a, ptr %b, ptr %c, i64 %N) {
6262
; IF-EVL: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF={1}' {
6363
; IF-EVL-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF
6464
; IF-EVL-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count
@@ -111,7 +111,7 @@ exit:
111111
ret void
112112
}
113113

114-
define void @vp_umax(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
114+
define void @vp_umax(ptr %a, ptr %b, ptr %c, i64 %N) {
115115
; IF-EVL: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF={1}' {
116116
; IF-EVL-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF
117117
; IF-EVL-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count
@@ -164,7 +164,7 @@ exit:
164164
ret void
165165
}
166166

167-
define void @vp_umin(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
167+
define void @vp_umin(ptr %a, ptr %b, ptr %c, i64 %N) {
168168
; IF-EVL: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF={1}' {
169169
; IF-EVL-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF
170170
; IF-EVL-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count
@@ -218,7 +218,7 @@ exit:
218218
}
219219

220220

221-
define void @vp_ctlz(ptr noalias %a, ptr noalias %b, i64 %N) {
221+
define void @vp_ctlz(ptr %a, ptr %b, i64 %N) {
222222
; IF-EVL: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF={1}' {
223223
; IF-EVL-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF
224224
; IF-EVL-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count
@@ -268,7 +268,7 @@ exit:
268268

269269
; FIXME: vp_cttz: Assertion `(BestFactor.Width == LegacyVF.Width || planContainsAdditionalSimplifications(getPlanFor(BestFactor.Width), CostCtx, OrigLoop)) && " VPlan cost model and legacy cost model disagreed"' failed
270270

271-
define void @vp_lrint(ptr noalias %a, ptr noalias %b, i64 %N) {
271+
define void @vp_lrint(ptr %a, ptr %b, i64 %N) {
272272
; IF-EVL: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF={1}' {
273273
; IF-EVL-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF
274274
; IF-EVL-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count
@@ -320,7 +320,7 @@ exit:
320320
ret void
321321
}
322322

323-
define void @vp_llrint(ptr noalias %a, ptr noalias %b, i64 %N) {
323+
define void @vp_llrint(ptr %a, ptr %b, i64 %N) {
324324
; IF-EVL: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF={1}' {
325325
; IF-EVL-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF
326326
; IF-EVL-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count
@@ -372,7 +372,7 @@ exit:
372372
ret void
373373
}
374374

375-
define void @vp_abs(ptr noalias %a, ptr noalias %b, i64 %N) {
375+
define void @vp_abs(ptr %a, ptr %b, i64 %N) {
376376
; IF-EVL: VPlan 'Initial VPlan for VF={vscale x 1,vscale x 2,vscale x 4},UF={1}' {
377377
; IF-EVL-NEXT: Live-in vp<[[VFUF:%[0-9]+]]> = VF * UF
378378
; IF-EVL-NEXT: Live-in vp<[[VTC:%[0-9]+]]> = vector-trip-count

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