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[MC] Rework AVR #121498 to not add extra argument to shouldForceRelocation
This removes the extra argument from commit 814b34f. Also remove unneeded `>= FirstLiteralRelocationKind`.
1 parent b09b9ac commit 8a1b4d0

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19 files changed

+27
-28
lines changed

19 files changed

+27
-28
lines changed

‎llvm/include/llvm/MC/MCAsmBackend.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -96,7 +96,6 @@ class MCAsmBackend {
9696
virtual bool shouldForceRelocation(const MCAssembler &Asm,
9797
const MCFixup &Fixup,
9898
const MCValue &Target,
99-
const uint64_t Value,
10099
const MCSubtargetInfo *STI) {
101100
return false;
102101
}

‎llvm/lib/MC/MCAssembler.cpp

Lines changed: 11 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -221,11 +221,17 @@ bool MCAssembler::evaluateFixup(const MCFixup &Fixup, const MCFragment *DF,
221221
}
222222

223223
// .reloc directive and the backend might force the relocation.
224-
if (IsResolved &&
225-
(Fixup.getKind() >= FirstLiteralRelocationKind ||
226-
getBackend().shouldForceRelocation(*this, Fixup, Target, Value, STI))) {
227-
IsResolved = false;
228-
WasForced = true;
224+
// Backends that customize shouldForceRelocation generally just need the fixup
225+
// kind. AVR needs the fixup value to bypass the assembly time overflow with a
226+
// relocation.
227+
if (IsResolved) {
228+
auto TargetVal = MCValue::get(Target.getSymA(), Target.getSymB(), Value,
229+
Target.getRefKind());
230+
if (Fixup.getKind() >= FirstLiteralRelocationKind ||
231+
getBackend().shouldForceRelocation(*this, Fixup, TargetVal, STI)) {
232+
IsResolved = false;
233+
WasForced = true;
234+
}
229235
}
230236

231237
// A linker relaxation target may emit ADD/SUB relocations for A-B+C. Let

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -98,7 +98,7 @@ class AArch64AsmBackend : public MCAsmBackend {
9898
unsigned getFixupKindContainereSizeInBytes(unsigned Kind) const;
9999

100100
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
101-
const MCValue &Target, const uint64_t Value,
101+
const MCValue &Target,
102102
const MCSubtargetInfo *STI) override;
103103
};
104104

@@ -520,7 +520,6 @@ bool AArch64AsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
520520
bool AArch64AsmBackend::shouldForceRelocation(const MCAssembler &Asm,
521521
const MCFixup &Fixup,
522522
const MCValue &Target,
523-
const uint64_t,
524523
const MCSubtargetInfo *STI) {
525524
// The ADRP instruction adds some multiple of 0x1000 to the current PC &
526525
// ~0xfff. This means that the required offset to reach a symbol can vary by

‎llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -955,7 +955,7 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,
955955

956956
bool ARMAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
957957
const MCFixup &Fixup,
958-
const MCValue &Target, const uint64_t,
958+
const MCValue &Target,
959959
const MCSubtargetInfo *STI) {
960960
const MCSymbolRefExpr *A = Target.getSymA();
961961
const MCSymbol *Sym = A ? &A->getSymbol() : nullptr;

‎llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -36,7 +36,7 @@ class ARMAsmBackend : public MCAsmBackend {
3636
const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
3737

3838
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
39-
const MCValue &Target, const uint64_t Value,
39+
const MCValue &Target,
4040
const MCSubtargetInfo *STI) override;
4141

4242
unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,

‎llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -501,23 +501,22 @@ bool AVRAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
501501
bool AVRAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
502502
const MCFixup &Fixup,
503503
const MCValue &Target,
504-
const uint64_t Value,
505504
const MCSubtargetInfo *STI) {
506505
switch ((unsigned)Fixup.getKind()) {
507506
default:
508-
return Fixup.getKind() >= FirstLiteralRelocationKind;
507+
return false;
509508

510509
case AVR::fixup_7_pcrel:
511510
case AVR::fixup_13_pcrel: {
512-
uint64_t ValueEx = Value;
511+
uint64_t Offset = Target.getConstant();
513512
uint64_t Size = AVRAsmBackend::getFixupKindInfo(Fixup.getKind()).TargetSize;
514513

515514
// If the jump is too large to encode it, fall back to a relocation.
516515
//
517516
// Note that trying to actually link that relocation *would* fail, but the
518517
// hopes are that the module we're currently compiling won't be actually
519518
// linked to the final binary.
520-
return !adjust::adjustRelativeBranch(Size, Fixup, ValueEx, STI);
519+
return !adjust::adjustRelativeBranch(Size, Fixup, Offset, STI);
521520
}
522521

523522
case AVR::fixup_call:

‎llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -53,7 +53,7 @@ class AVRAsmBackend : public MCAsmBackend {
5353
const MCSubtargetInfo *STI) const override;
5454

5555
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
56-
const MCValue &Target, const uint64_t Value,
56+
const MCValue &Target,
5757
const MCSubtargetInfo *STI) override;
5858

5959
private:

‎llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -262,7 +262,6 @@ bool CSKYAsmBackend::mayNeedRelaxation(const MCInst &Inst,
262262
bool CSKYAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
263263
const MCFixup &Fixup,
264264
const MCValue &Target,
265-
const uint64_t /*Value*/,
266265
const MCSubtargetInfo * /*STI*/) {
267266
if (Fixup.getKind() >= FirstLiteralRelocationKind)
268267
return true;

‎llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -52,7 +52,7 @@ class CSKYAsmBackend : public MCAsmBackend {
5252
const MCSubtargetInfo *STI) const override;
5353

5454
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
55-
const MCValue &Target, const uint64_t Value,
55+
const MCValue &Target,
5656
const MCSubtargetInfo *STI) override;
5757

5858
std::unique_ptr<MCObjectTargetWriter>

‎llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -201,7 +201,7 @@ class HexagonAsmBackend : public MCAsmBackend {
201201
}
202202

203203
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
204-
const MCValue &Target, const uint64_t,
204+
const MCValue &Target,
205205
const MCSubtargetInfo *STI) override {
206206
switch(Fixup.getTargetKind()) {
207207
default:

‎llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -251,7 +251,6 @@ bool LoongArchAsmBackend::shouldInsertFixupForCodeAlign(MCAssembler &Asm,
251251
bool LoongArchAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
252252
const MCFixup &Fixup,
253253
const MCValue &Target,
254-
const uint64_t,
255254
const MCSubtargetInfo *STI) {
256255
switch (Fixup.getTargetKind()) {
257256
default:

‎llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -57,7 +57,7 @@ class LoongArchAsmBackend : public MCAsmBackend {
5757
MCAlignFragment &AF) override;
5858

5959
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
60-
const MCValue &Target, const uint64_t Value,
60+
const MCValue &Target,
6161
const MCSubtargetInfo *STI) override;
6262

6363
unsigned getNumFixupKinds() const override {

‎llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -561,7 +561,6 @@ bool MipsAsmBackend::writeNopData(raw_ostream &OS, uint64_t Count,
561561
bool MipsAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
562562
const MCFixup &Fixup,
563563
const MCValue &Target,
564-
const uint64_t,
565564
const MCSubtargetInfo *STI) {
566565
const unsigned FixupKind = Fixup.getKind();
567566
switch (FixupKind) {

‎llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ class MipsAsmBackend : public MCAsmBackend {
5555
const MCSubtargetInfo *STI) const override;
5656

5757
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
58-
const MCValue &Target, const uint64_t Value,
58+
const MCValue &Target,
5959
const MCSubtargetInfo *STI) override;
6060

6161
bool isMicroMips(const MCSymbol *Sym) const override;

‎llvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -161,7 +161,7 @@ class PPCAsmBackend : public MCAsmBackend {
161161
}
162162

163163
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
164-
const MCValue &Target, const uint64_t,
164+
const MCValue &Target,
165165
const MCSubtargetInfo *STI) override {
166166
MCFixupKind Kind = Fixup.getKind();
167167
switch ((unsigned)Kind) {

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -115,7 +115,6 @@ RISCVAsmBackend::getFixupKindInfo(MCFixupKind Kind) const {
115115
bool RISCVAsmBackend::shouldForceRelocation(const MCAssembler &Asm,
116116
const MCFixup &Fixup,
117117
const MCValue &Target,
118-
const uint64_t,
119118
const MCSubtargetInfo *STI) {
120119
switch (Fixup.getTargetKind()) {
121120
default:
@@ -569,7 +568,7 @@ bool RISCVAsmBackend::evaluateTargetFixup(const MCAssembler &Asm,
569568
Value = Asm.getSymbolOffset(SA) + AUIPCTarget.getConstant();
570569
Value -= Asm.getFragmentOffset(*AUIPCDF) + AUIPCFixup->getOffset();
571570

572-
if (shouldForceRelocation(Asm, *AUIPCFixup, AUIPCTarget, Value, STI)) {
571+
if (shouldForceRelocation(Asm, *AUIPCFixup, AUIPCTarget, STI)) {
573572
WasForced = true;
574573
return false;
575574
}

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ class RISCVAsmBackend : public MCAsmBackend {
6565
createObjectTargetWriter() const override;
6666

6767
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
68-
const MCValue &Target, const uint64_t Value,
68+
const MCValue &Target,
6969
const MCSubtargetInfo *STI) override;
7070

7171
bool fixupNeedsRelaxationAdvanced(const MCAssembler &Asm,

‎llvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -273,7 +273,7 @@ namespace {
273273
}
274274

275275
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
276-
const MCValue &Target, const uint64_t,
276+
const MCValue &Target,
277277
const MCSubtargetInfo *STI) override {
278278
switch ((Sparc::Fixups)Fixup.getKind()) {
279279
default:

‎llvm/lib/Target/VE/MCTargetDesc/VEAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -132,7 +132,7 @@ class VEAsmBackend : public MCAsmBackend {
132132
}
133133

134134
bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
135-
const MCValue &Target, const uint64_t,
135+
const MCValue &Target,
136136
const MCSubtargetInfo *STI) override {
137137
switch ((VE::Fixups)Fixup.getKind()) {
138138
default:

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