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Revert "[mlir][affine] allow iter args as valid dims (#139069)"
This reverts commit 5f9fd47.
1 parent 04ad8d4 commit 8986694

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2 files changed

+8
-7
lines changed

2 files changed

+8
-7
lines changed

mlir/lib/Dialect/Affine/IR/AffineOps.cpp

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -294,10 +294,12 @@ bool mlir::affine::isValidDim(Value value) {
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return isValidDim(value, getAffineScope(defOp));
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// This value has to be a block argument for an op that has the
297-
// `AffineScope` trait or for an affine.for or affine.parallel.
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// `AffineScope` trait or an induction var of an affine.for or
298+
// affine.parallel.
299+
if (isAffineInductionVar(value))
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return true;
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auto *parentOp = llvm::cast<BlockArgument>(value).getOwner()->getParentOp();
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return parentOp && (parentOp->hasTrait<OpTrait::AffineScope>() ||
300-
isa<AffineForOp, AffineParallelOp>(parentOp));
302+
return parentOp && parentOp->hasTrait<OpTrait::AffineScope>();
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}
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// Value can be used as a dimension id iff it meets one of the following
@@ -318,10 +320,9 @@ bool mlir::affine::isValidDim(Value value, Region *region) {
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auto *op = value.getDefiningOp();
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if (!op) {
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// This value has to be a block argument for an affine.for or an
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// This value has to be an induction var for an affine.for or an
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// affine.parallel.
323-
auto *parentOp = llvm::cast<BlockArgument>(value).getOwner()->getParentOp();
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return isa<AffineForOp, AffineParallelOp>(parentOp);
325+
return isAffineInductionVar(value);
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}
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// Affine apply operation is ok if all of its operands are ok.

mlir/test/Dialect/Affine/raise-memref.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ func.func @symbols(%N : index) {
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// CHECK: %[[lhs5:.*]] = arith.addf %[[lhs]], %[[lhs4]]
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// CHECK: %[[lhs6:.*]] = arith.addi %[[a4]], %[[cst1]]
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// CHECK: affine.store %[[lhs5]], %{{.*}}[%[[a1]], symbol(%arg0) + 1] :
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// CHECK: affine.store %[[lhs5]], %{{.*}}[%[[a1]], %arg4 + 1] :
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// CHECK: memref.store %[[lhs5]], %{{.*}}[%[[a1]], %[[lhs6]]] :
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// CHECK: %[[lhs7:.*]] = "ab.v"
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// CHECK: memref.store %[[lhs5]], %{{.*}}[%[[a1]], %[[lhs7]]] :
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// CHECK: affine.yield %[[lhs6]]

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