Skip to content

Commit 800d222

Browse files
committed
[BasicTTI] Remove unused support for multiple opcodes in getTypeBasedIntrinsicInstrCost [nfc]
ISDs only ever contains a single ISD opcode. We can simplify the code under this assumption. The code being removed was added back in 2016 in 0f26b0a to support FMAXNAN/FMINNAN, but at some point since then the motivating case was rewritten not to use the ISDs mechanism. No reason to keep the false generality around now.
1 parent 520d17b commit 800d222

File tree

1 file changed

+49
-62
lines changed

1 file changed

+49
-62
lines changed

llvm/include/llvm/CodeGen/BasicTTIImpl.h

Lines changed: 49 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -1612,7 +1612,7 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
16121612

16131613
// Library call cost - other than size, make it expensive.
16141614
unsigned SingleCallCost = CostKind == TTI::TCK_CodeSize ? 1 : 10;
1615-
SmallVector<unsigned, 2> ISDs;
1615+
unsigned ISD;
16161616
switch (IID) {
16171617
default: {
16181618
// Scalable vectors cannot be scalarized, so return Invalid.
@@ -1657,82 +1657,82 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
16571657
// Look for intrinsics that can be lowered directly or turned into a scalar
16581658
// intrinsic call.
16591659
case Intrinsic::sqrt:
1660-
ISDs.push_back(ISD::FSQRT);
1660+
ISD = ISD::FSQRT;
16611661
break;
16621662
case Intrinsic::sin:
1663-
ISDs.push_back(ISD::FSIN);
1663+
ISD = ISD::FSIN;
16641664
break;
16651665
case Intrinsic::cos:
1666-
ISDs.push_back(ISD::FCOS);
1666+
ISD = ISD::FCOS;
16671667
break;
16681668
case Intrinsic::exp:
1669-
ISDs.push_back(ISD::FEXP);
1669+
ISD = ISD::FEXP;
16701670
break;
16711671
case Intrinsic::exp2:
1672-
ISDs.push_back(ISD::FEXP2);
1672+
ISD = ISD::FEXP2;
16731673
break;
16741674
case Intrinsic::log:
1675-
ISDs.push_back(ISD::FLOG);
1675+
ISD = ISD::FLOG;
16761676
break;
16771677
case Intrinsic::log10:
1678-
ISDs.push_back(ISD::FLOG10);
1678+
ISD = ISD::FLOG10;
16791679
break;
16801680
case Intrinsic::log2:
1681-
ISDs.push_back(ISD::FLOG2);
1681+
ISD = ISD::FLOG2;
16821682
break;
16831683
case Intrinsic::fabs:
1684-
ISDs.push_back(ISD::FABS);
1684+
ISD = ISD::FABS;
16851685
break;
16861686
case Intrinsic::canonicalize:
1687-
ISDs.push_back(ISD::FCANONICALIZE);
1687+
ISD = ISD::FCANONICALIZE;
16881688
break;
16891689
case Intrinsic::minnum:
1690-
ISDs.push_back(ISD::FMINNUM);
1690+
ISD = ISD::FMINNUM;
16911691
break;
16921692
case Intrinsic::maxnum:
1693-
ISDs.push_back(ISD::FMAXNUM);
1693+
ISD = ISD::FMAXNUM;
16941694
break;
16951695
case Intrinsic::minimum:
1696-
ISDs.push_back(ISD::FMINIMUM);
1696+
ISD = ISD::FMINIMUM;
16971697
break;
16981698
case Intrinsic::maximum:
1699-
ISDs.push_back(ISD::FMAXIMUM);
1699+
ISD = ISD::FMAXIMUM;
17001700
break;
17011701
case Intrinsic::copysign:
1702-
ISDs.push_back(ISD::FCOPYSIGN);
1702+
ISD = ISD::FCOPYSIGN;
17031703
break;
17041704
case Intrinsic::floor:
1705-
ISDs.push_back(ISD::FFLOOR);
1705+
ISD = ISD::FFLOOR;
17061706
break;
17071707
case Intrinsic::ceil:
1708-
ISDs.push_back(ISD::FCEIL);
1708+
ISD = ISD::FCEIL;
17091709
break;
17101710
case Intrinsic::trunc:
1711-
ISDs.push_back(ISD::FTRUNC);
1711+
ISD = ISD::FTRUNC;
17121712
break;
17131713
case Intrinsic::nearbyint:
1714-
ISDs.push_back(ISD::FNEARBYINT);
1714+
ISD = ISD::FNEARBYINT;
17151715
break;
17161716
case Intrinsic::rint:
1717-
ISDs.push_back(ISD::FRINT);
1717+
ISD = ISD::FRINT;
17181718
break;
17191719
case Intrinsic::round:
1720-
ISDs.push_back(ISD::FROUND);
1720+
ISD = ISD::FROUND;
17211721
break;
17221722
case Intrinsic::roundeven:
1723-
ISDs.push_back(ISD::FROUNDEVEN);
1723+
ISD = ISD::FROUNDEVEN;
17241724
break;
17251725
case Intrinsic::pow:
1726-
ISDs.push_back(ISD::FPOW);
1726+
ISD = ISD::FPOW;
17271727
break;
17281728
case Intrinsic::fma:
1729-
ISDs.push_back(ISD::FMA);
1729+
ISD = ISD::FMA;
17301730
break;
17311731
case Intrinsic::fmuladd:
1732-
ISDs.push_back(ISD::FMA);
1732+
ISD = ISD::FMA;
17331733
break;
17341734
case Intrinsic::experimental_constrained_fmuladd:
1735-
ISDs.push_back(ISD::STRICT_FMA);
1735+
ISD = ISD::STRICT_FMA;
17361736
break;
17371737
// FIXME: We should return 0 whenever getIntrinsicCost == TCC_Free.
17381738
case Intrinsic::lifetime_start:
@@ -1976,61 +1976,48 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
19761976
return Cost;
19771977
}
19781978
case Intrinsic::ctpop:
1979-
ISDs.push_back(ISD::CTPOP);
1979+
ISD = ISD::CTPOP;
19801980
// In case of legalization use TCC_Expensive. This is cheaper than a
19811981
// library call but still not a cheap instruction.
19821982
SingleCallCost = TargetTransformInfo::TCC_Expensive;
19831983
break;
19841984
case Intrinsic::ctlz:
1985-
ISDs.push_back(ISD::CTLZ);
1985+
ISD = ISD::CTLZ;
19861986
break;
19871987
case Intrinsic::cttz:
1988-
ISDs.push_back(ISD::CTTZ);
1988+
ISD = ISD::CTTZ;
19891989
break;
19901990
case Intrinsic::bswap:
1991-
ISDs.push_back(ISD::BSWAP);
1991+
ISD = ISD::BSWAP;
19921992
break;
19931993
case Intrinsic::bitreverse:
1994-
ISDs.push_back(ISD::BITREVERSE);
1994+
ISD = ISD::BITREVERSE;
19951995
break;
19961996
}
19971997

19981998
const TargetLoweringBase *TLI = getTLI();
19991999
std::pair<InstructionCost, MVT> LT =
20002000
TLI->getTypeLegalizationCost(DL, RetTy);
20012001

2002-
SmallVector<InstructionCost, 2> LegalCost;
2003-
SmallVector<InstructionCost, 2> CustomCost;
2004-
for (unsigned ISD : ISDs) {
2005-
if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
2006-
if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
2007-
TLI->isFAbsFree(LT.second)) {
2008-
return 0;
2009-
}
2010-
2011-
// The operation is legal. Assume it costs 1.
2012-
// If the type is split to multiple registers, assume that there is some
2013-
// overhead to this.
2014-
// TODO: Once we have extract/insert subvector cost we need to use them.
2015-
if (LT.first > 1)
2016-
LegalCost.push_back(LT.first * 2);
2017-
else
2018-
LegalCost.push_back(LT.first * 1);
2019-
} else if (!TLI->isOperationExpand(ISD, LT.second)) {
2020-
// If the operation is custom lowered then assume
2021-
// that the code is twice as expensive.
2022-
CustomCost.push_back(LT.first * 2);
2002+
if (TLI->isOperationLegalOrPromote(ISD, LT.second)) {
2003+
if (IID == Intrinsic::fabs && LT.second.isFloatingPoint() &&
2004+
TLI->isFAbsFree(LT.second)) {
2005+
return 0;
20232006
}
2024-
}
20252007

2026-
auto *MinLegalCostI = std::min_element(LegalCost.begin(), LegalCost.end());
2027-
if (MinLegalCostI != LegalCost.end())
2028-
return *MinLegalCostI;
2029-
2030-
auto MinCustomCostI =
2031-
std::min_element(CustomCost.begin(), CustomCost.end());
2032-
if (MinCustomCostI != CustomCost.end())
2033-
return *MinCustomCostI;
2008+
// The operation is legal. Assume it costs 1.
2009+
// If the type is split to multiple registers, assume that there is some
2010+
// overhead to this.
2011+
// TODO: Once we have extract/insert subvector cost we need to use them.
2012+
if (LT.first > 1)
2013+
return (LT.first * 2);
2014+
else
2015+
return (LT.first * 1);
2016+
} else if (!TLI->isOperationExpand(ISD, LT.second)) {
2017+
// If the operation is custom lowered then assume
2018+
// that the code is twice as expensive.
2019+
return (LT.first * 2);
2020+
}
20342021

20352022
// If we can't lower fmuladd into an FMA estimate the cost as a floating
20362023
// point mul followed by an add.

0 commit comments

Comments
 (0)