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1 parent 337cac4 commit 7dfb95fCopy full SHA for 7dfb95f
mlir/lib/Conversion/GPUToAMDGPU/GPUToAMDGPU.cpp
@@ -131,7 +131,6 @@ struct ScalarSubgroupReduceToShuffles final
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LogicalResult matchAndRewrite(gpu::SubgroupReduceOp op,
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PatternRewriter &rewriter) const override {
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- llvm::errs() << "ScalarSubgroupReduceToShuffles" << "\n";
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if (op.getClusterSize().has_value() != matchClustered) {
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return rewriter.notifyMatchFailure(
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op, llvm::formatv("op is {0}clustered but pattern is configured to "
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