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[AggressiveInstCombine] Add test for shifts from or chains. NFC
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‎llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll

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@@ -2480,3 +2480,55 @@ define void @bitcast_gep(ptr %p, ptr %dest) {
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store i32 %trunc, ptr %dest, align 4
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ret void
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}
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define i1 @loadCombine_4consecutive_rev_icmp0(ptr %p) {
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; LE-LABEL: @loadCombine_4consecutive_rev_icmp0(
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; LE-NEXT: [[L1:%.*]] = load i32, ptr [[P:%.*]], align 1
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; LE-NEXT: [[C:%.*]] = icmp eq i32 [[L1]], 0
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; LE-NEXT: ret i1 [[C]]
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;
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; BE-LABEL: @loadCombine_4consecutive_rev_icmp0(
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; BE-NEXT: [[P1:%.*]] = getelementptr i8, ptr [[P:%.*]], i32 1
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; BE-NEXT: [[P2:%.*]] = getelementptr i8, ptr [[P]], i32 2
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; BE-NEXT: [[P3:%.*]] = getelementptr i8, ptr [[P]], i32 3
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; BE-NEXT: [[L1:%.*]] = load i8, ptr [[P]], align 1
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; BE-NEXT: [[L2:%.*]] = load i8, ptr [[P1]], align 1
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; BE-NEXT: [[L3:%.*]] = load i8, ptr [[P2]], align 1
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; BE-NEXT: [[L4:%.*]] = load i8, ptr [[P3]], align 1
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; BE-NEXT: [[E1:%.*]] = zext i8 [[L1]] to i32
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; BE-NEXT: [[E2:%.*]] = zext i8 [[L2]] to i32
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; BE-NEXT: [[E3:%.*]] = zext i8 [[L3]] to i32
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; BE-NEXT: [[E4:%.*]] = zext i8 [[L4]] to i32
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; BE-NEXT: [[S2:%.*]] = shl i32 [[E2]], 8
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; BE-NEXT: [[S3:%.*]] = shl i32 [[E3]], 16
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; BE-NEXT: [[S4:%.*]] = shl i32 [[E4]], 24
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; BE-NEXT: [[O1:%.*]] = or i32 [[S4]], [[S3]]
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; BE-NEXT: [[O2:%.*]] = or i32 [[O1]], [[S2]]
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; BE-NEXT: [[O3:%.*]] = or i32 [[O2]], [[E1]]
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; BE-NEXT: [[C:%.*]] = icmp eq i32 [[O3]], 0
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; BE-NEXT: ret i1 [[C]]
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;
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%p1 = getelementptr i8, ptr %p, i32 1
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%p2 = getelementptr i8, ptr %p, i32 2
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%p3 = getelementptr i8, ptr %p, i32 3
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%l1 = load i8, ptr %p
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%l2 = load i8, ptr %p1
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%l3 = load i8, ptr %p2
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%l4 = load i8, ptr %p3
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%e1 = zext i8 %l1 to i32
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%e2 = zext i8 %l2 to i32
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%e3 = zext i8 %l3 to i32
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%e4 = zext i8 %l4 to i32
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%s2 = shl i32 %e2, 8
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%s3 = shl i32 %e3, 16
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%s4 = shl i32 %e4, 24
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%o1 = or i32 %s4, %s3
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%o2 = or i32 %o1, %s2
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%o3 = or i32 %o2, %e1
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%c = icmp eq i32 %o3, 0
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ret i1 %c
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}

‎llvm/test/Transforms/AggressiveInstCombine/or-shift-chain.ll

Lines changed: 147 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,147 @@
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt < %s -passes=aggressive-instcombine -S | FileCheck %s
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define i1 @remove_shift_nuw_ab(i8 %a, i8 %b, i8 %s) {
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; CHECK-LABEL: @remove_shift_nuw_ab(
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; CHECK-NEXT: [[T:%.*]] = shl nuw i8 [[A:%.*]], [[S:%.*]]
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; CHECK-NEXT: [[OR:%.*]] = or i8 [[T]], [[B:%.*]]
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; CHECK-NEXT: [[IC:%.*]] = icmp eq i8 [[OR]], 0
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; CHECK-NEXT: ret i1 [[IC]]
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;
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%t = shl nuw i8 %a, %s
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%or = or i8 %t, %b
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%ic = icmp eq i8 %or, 0
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ret i1 %ic
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}
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define i1 @remove_shift_nuw_ba(i8 %a, i8 %b, i8 %s) {
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; CHECK-LABEL: @remove_shift_nuw_ba(
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; CHECK-NEXT: [[T:%.*]] = shl nuw i8 [[A:%.*]], [[S:%.*]]
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; CHECK-NEXT: [[OR:%.*]] = or i8 [[B:%.*]], [[T]]
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; CHECK-NEXT: [[IC:%.*]] = icmp eq i8 [[OR]], 0
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; CHECK-NEXT: ret i1 [[IC]]
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;
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%t = shl nuw i8 %a, %s
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%or = or i8 %b, %t
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%ic = icmp eq i8 %or, 0
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ret i1 %ic
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}
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define i1 @remove_shift_nsw(i8 %a, i8 %b, i8 %s) {
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; CHECK-LABEL: @remove_shift_nsw(
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; CHECK-NEXT: [[T:%.*]] = shl nsw i8 [[A:%.*]], [[S:%.*]]
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; CHECK-NEXT: [[OR:%.*]] = or i8 [[T]], [[B:%.*]]
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; CHECK-NEXT: [[IC:%.*]] = icmp eq i8 [[OR]], 0
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; CHECK-NEXT: ret i1 [[IC]]
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;
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%t = shl nsw i8 %a, %s
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%or = or i8 %t, %b
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%ic = icmp eq i8 %or, 0
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ret i1 %ic
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}
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define i1 @remove_shift_nuw_ne(i8 %a, i8 %b, i8 %s) {
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; CHECK-LABEL: @remove_shift_nuw_ne(
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; CHECK-NEXT: [[T:%.*]] = shl nuw i8 [[A:%.*]], [[S:%.*]]
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; CHECK-NEXT: [[OR:%.*]] = or i8 [[T]], [[B:%.*]]
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; CHECK-NEXT: [[IC:%.*]] = icmp eq i8 [[OR]], 0
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; CHECK-NEXT: ret i1 [[IC]]
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;
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%t = shl nuw i8 %a, %s
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%or = or i8 %t, %b
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%ic = icmp eq i8 %or, 0
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ret i1 %ic
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}
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define i1 @remove_shift_nsw_ne(i8 %a, i8 %b, i8 %s) {
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; CHECK-LABEL: @remove_shift_nsw_ne(
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; CHECK-NEXT: [[T:%.*]] = shl nsw i8 [[A:%.*]], [[S:%.*]]
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; CHECK-NEXT: [[OR:%.*]] = or i8 [[T]], [[B:%.*]]
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; CHECK-NEXT: [[IC:%.*]] = icmp eq i8 [[OR]], 0
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; CHECK-NEXT: ret i1 [[IC]]
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;
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%t = shl nsw i8 %a, %s
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%or = or i8 %t, %b
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%ic = icmp eq i8 %or, 0
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ret i1 %ic
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}
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define i1 @remove_shift_wraps(i8 %a, i8 %b, i8 %s) {
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; CHECK-LABEL: @remove_shift_wraps(
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; CHECK-NEXT: [[T:%.*]] = shl i8 [[A:%.*]], [[S:%.*]]
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; CHECK-NEXT: [[OR:%.*]] = or i8 [[T]], [[B:%.*]]
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; CHECK-NEXT: [[IC:%.*]] = icmp eq i8 [[OR]], 0
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; CHECK-NEXT: ret i1 [[IC]]
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;
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%t = shl i8 %a, %s
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%or = or i8 %t, %b
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%ic = icmp eq i8 %or, 0
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ret i1 %ic
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}
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define i1 @remove_shift_chain_d(i8 %a, i8 %b, i8 %c, i8 %d, i8 %s) {
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; CHECK-LABEL: @remove_shift_chain_d(
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; CHECK-NEXT: [[DT:%.*]] = shl nuw i8 [[D:%.*]], [[S:%.*]]
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; CHECK-NEXT: [[OR1:%.*]] = or i8 [[A:%.*]], [[B:%.*]]
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; CHECK-NEXT: [[OR2:%.*]] = or i8 [[C:%.*]], [[DT]]
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; CHECK-NEXT: [[OR:%.*]] = or i8 [[OR1]], [[OR2]]
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; CHECK-NEXT: [[IC:%.*]] = icmp eq i8 [[OR]], 0
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; CHECK-NEXT: ret i1 [[IC]]
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;
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%dt = shl nuw i8 %d, %s
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%or1 = or i8 %a, %b
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%or2 = or i8 %c, %dt
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%or = or i8 %or1, %or2
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%ic = icmp eq i8 %or, 0
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ret i1 %ic
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}
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define i1 @remove_shift_chain_abcd(i8 %a, i8 %b, i8 %c, i8 %d, i8 %s) {
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; CHECK-LABEL: @remove_shift_chain_abcd(
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; CHECK-NEXT: [[AT:%.*]] = shl nuw i8 [[A:%.*]], [[S:%.*]]
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; CHECK-NEXT: [[BT:%.*]] = shl nuw i8 [[B:%.*]], 2
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; CHECK-NEXT: [[CT:%.*]] = shl nuw i8 [[C:%.*]], 1
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; CHECK-NEXT: [[DT:%.*]] = shl nuw i8 [[D:%.*]], [[S]]
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; CHECK-NEXT: [[OR1:%.*]] = or i8 [[AT]], [[BT]]
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; CHECK-NEXT: [[OR2:%.*]] = or i8 [[CT]], [[DT]]
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; CHECK-NEXT: [[OR:%.*]] = or i8 [[OR1]], [[OR2]]
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; CHECK-NEXT: [[IC:%.*]] = icmp eq i8 [[OR]], 0
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; CHECK-NEXT: ret i1 [[IC]]
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;
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%at = shl nuw i8 %a, %s
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%bt = shl nuw i8 %b, 2
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%ct = shl nuw i8 %c, 1
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%dt = shl nuw i8 %d, %s
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%or1 = or i8 %at, %bt
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%or2 = or i8 %ct, %dt
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%or = or i8 %or1, %or2
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%ic = icmp eq i8 %or, 0
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ret i1 %ic
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}
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define i1 @remove_shift_chain_abcd_multiuse(i8 %a, i8 %b, i8 %c, i8 %d, i8 %s) {
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; CHECK-LABEL: @remove_shift_chain_abcd_multiuse(
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; CHECK-NEXT: [[AT:%.*]] = shl nuw i8 [[A:%.*]], [[S:%.*]]
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; CHECK-NEXT: [[BT:%.*]] = shl nuw i8 [[B:%.*]], 2
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; CHECK-NEXT: [[CT:%.*]] = shl nuw i8 [[C:%.*]], 1
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; CHECK-NEXT: [[DT:%.*]] = shl nuw i8 [[D:%.*]], [[S]]
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; CHECK-NEXT: [[OR1:%.*]] = or i8 [[AT]], [[BT]]
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; CHECK-NEXT: [[OR2:%.*]] = or i8 [[CT]], [[DT]]
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; CHECK-NEXT: [[OR:%.*]] = or i8 [[OR1]], [[OR2]]
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; CHECK-NEXT: [[IC:%.*]] = icmp eq i8 [[OR]], 0
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; CHECK-NEXT: call void @use(i8 [[OR]])
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; CHECK-NEXT: ret i1 [[IC]]
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;
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%at = shl nuw i8 %a, %s
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%bt = shl nuw i8 %b, 2
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%ct = shl nuw i8 %c, 1
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%dt = shl nuw i8 %d, %s
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%or1 = or i8 %at, %bt
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%or2 = or i8 %ct, %dt
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%or = or i8 %or1, %or2
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%ic = icmp eq i8 %or, 0
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call void @use(i8 %or)
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ret i1 %ic
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}
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declare void @use(i8)

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