From 6a8a5629a6042da602fbc586c8b41137cdd2f053 Mon Sep 17 00:00:00 2001 From: zhongyunde 00443407 Date: Fri, 1 Dec 2023 14:32:27 +0800 Subject: [PATCH] [AArch64] Precommit tests for PR71917 --- llvm/test/CodeGen/AArch64/arm64-addrmode.ll | 87 +++++++++++++++++++++ 1 file changed, 87 insertions(+) diff --git a/llvm/test/CodeGen/AArch64/arm64-addrmode.ll b/llvm/test/CodeGen/AArch64/arm64-addrmode.ll index 69c558d9d5599d..72c979c5a844df 100644 --- a/llvm/test/CodeGen/AArch64/arm64-addrmode.ll +++ b/llvm/test/CodeGen/AArch64/arm64-addrmode.ll @@ -209,3 +209,90 @@ define void @t17(i64 %a) { %3 = load volatile i64, ptr %2, align 8 ret void } + +define i32 @LdOffset_i8(ptr %a) { +; CHECK-LABEL: LdOffset_i8: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #56952 // =0xde78 +; CHECK-NEXT: movk w8, #15, lsl #16 +; CHECK-NEXT: ldrb w0, [x0, x8] +; CHECK-NEXT: ret + %arrayidx = getelementptr inbounds i8, ptr %a, i64 1039992 + %val = load i8, ptr %arrayidx, align 1 + %conv = zext i8 %val to i32 + ret i32 %conv +} + +define i32 @LdOffset_i16(ptr %a) { +; CHECK-LABEL: LdOffset_i16: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #48368 // =0xbcf0 +; CHECK-NEXT: movk w8, #31, lsl #16 +; CHECK-NEXT: ldrsh w0, [x0, x8] +; CHECK-NEXT: ret + %arrayidx = getelementptr inbounds i16, ptr %a, i64 1039992 + %val = load i16, ptr %arrayidx, align 2 + %conv = sext i16 %val to i32 + ret i32 %conv +} + +define i32 @LdOffset_i32(ptr %a) { +; CHECK-LABEL: LdOffset_i32: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #31200 // =0x79e0 +; CHECK-NEXT: movk w8, #63, lsl #16 +; CHECK-NEXT: ldr w0, [x0, x8] +; CHECK-NEXT: ret + %arrayidx = getelementptr inbounds i32, ptr %a, i64 1039992 + %val = load i32, ptr %arrayidx, align 4 + ret i32 %val +} + +define i64 @LdOffset_i64_multi_offset(ptr %a) { +; CHECK-LABEL: LdOffset_i64_multi_offset: +; CHECK: // %bb.0: +; CHECK-NEXT: add x8, x0, #2031, lsl #12 // =8318976 +; CHECK-NEXT: add x8, x8, #960 +; CHECK-NEXT: ldr x9, [x8] +; CHECK-NEXT: ldr x8, [x8, #2056] +; CHECK-NEXT: add x0, x8, x9 +; CHECK-NEXT: ret + %arrayidx = getelementptr inbounds i64, ptr %a, i64 1039992 + %val0 = load i64, ptr %arrayidx, align 8 + %arrayidx1 = getelementptr inbounds i64, ptr %a, i64 1040249 + %val1 = load i64, ptr %arrayidx1, align 8 + %add = add nsw i64 %val1, %val0 + ret i64 %add +} + +define i64 @LdOffset_i64_multi_offset_with_commmon_base(ptr %a) { +; CHECK-LABEL: LdOffset_i64_multi_offset_with_commmon_base: +; CHECK: // %bb.0: +; CHECK-NEXT: add x8, x0, #507, lsl #12 // =2076672 +; CHECK-NEXT: ldr x9, [x8, #26464] +; CHECK-NEXT: ldr x8, [x8, #26496] +; CHECK-NEXT: add x0, x8, x9 +; CHECK-NEXT: ret + %b = getelementptr inbounds i16, ptr %a, i64 1038336 + %arrayidx = getelementptr inbounds i64, ptr %b, i64 3308 + %val0 = load i64, ptr %arrayidx, align 8 + %arrayidx1 = getelementptr inbounds i64, ptr %b, i64 3312 + %val1 = load i64, ptr %arrayidx1, align 8 + %add = add nsw i64 %val1, %val0 + ret i64 %add +} + +; Negative test: the offset is odd +define i32 @LdOffset_i16_odd_offset(ptr nocapture noundef readonly %a) { +; CHECK-LABEL: LdOffset_i16_odd_offset: +; CHECK: // %bb.0: +; CHECK-NEXT: mov w8, #56953 // =0xde79 +; CHECK-NEXT: movk w8, #15, lsl #16 +; CHECK-NEXT: ldrsh w0, [x0, x8] +; CHECK-NEXT: ret + %arrayidx = getelementptr inbounds i8, ptr %a, i64 1039993 + %val = load i16, ptr %arrayidx, align 2 + %conv = sext i16 %val to i32 + ret i32 %conv +} +