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Rebase and address review comments.
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+20
-18
lines changed

2 files changed

+20
-18
lines changed

llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -100,7 +100,7 @@ inline raw_ostream &operator<<(raw_ostream &OS, const ArgDescriptor &Arg) {
100100

101101
namespace KernArgPreload {
102102

103-
enum HiddenArg {
103+
enum HiddenArg : unsigned {
104104
HIDDEN_BLOCK_COUNT_X = 0,
105105
HIDDEN_BLOCK_COUNT_Y = 1,
106106
HIDDEN_BLOCK_COUNT_Z = 2,
@@ -110,7 +110,7 @@ enum HiddenArg {
110110
HIDDEN_REMAINDER_X = 6,
111111
HIDDEN_REMAINDER_Y = 7,
112112
HIDDEN_REMAINDER_Z = 8,
113-
END_HIDDEN_ARGS = 9
113+
END_HIDDEN_ARGS = HIDDEN_REMAINDER_Z + 1
114114
};
115115

116116
// Stores information about a specific hidden argument.
@@ -165,7 +165,7 @@ struct KernArgPreloadDescriptor {
165165
unsigned PartIdx = 0;
166166

167167
// The registers that the argument is preloaded into. The argument may be
168-
// split accross multilpe registers.
168+
// split across multiple registers.
169169
SmallVector<MCRegister, 2> Regs;
170170
};
171171

llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp

Lines changed: 17 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -788,14 +788,15 @@ void MetadataStreamerMsgPackV6::emitHiddenKernelArg(
788788
KernArgPreload::HiddenArg HiddenArg, const AMDGPUFunctionArgInfo *ArgInfo) {
789789
assert(ArgInfo && HiddenArg != KernArgPreload::END_HIDDEN_ARGS);
790790

791-
SmallString<16> PreloadStr;
792-
const auto *PreloadDesc = ArgInfo->getHiddenArgPreloadDescriptor(HiddenArg);
791+
SmallString<32> PreloadStr;
792+
const KernArgPreload::KernArgPreloadDescriptor *PreloadDesc =
793+
ArgInfo->getHiddenArgPreloadDescriptor(HiddenArg);
793794
if (PreloadDesc) {
794-
const auto &Regs = PreloadDesc->Regs;
795-
for (unsigned I = 0; I < Regs.size(); ++I) {
796-
if (I > 0)
797-
PreloadStr += " ";
798-
PreloadStr += AMDGPUInstPrinter::getRegisterName(Regs[I]);
795+
const SmallVectorImpl<MCRegister> &Regs = PreloadDesc->Regs;
796+
for (const auto &Reg : Regs) {
797+
if (!PreloadStr.empty())
798+
PreloadStr.push_back(' ');
799+
PreloadStr += AMDGPUInstPrinter::getRegisterName(Reg);
799800
}
800801
}
801802
emitKernelArgImpl(DL, ArgTy, Alignment, ArgName, Offset, Args, PreloadStr);
@@ -806,19 +807,20 @@ void MetadataStreamerMsgPackV6::emitKernelArg(const Argument &Arg,
806807
msgpack::ArrayDocNode Args,
807808
const MachineFunction &MF) {
808809
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
809-
SmallString<8> PreloadRegisters;
810+
SmallString<32> PreloadRegisters;
810811
if (MFI->getNumKernargPreloadedSGPRs()) {
811812
assert(MF.getSubtarget<GCNSubtarget>().hasKernargPreload());
812-
const auto &PreloadDescs =
813-
MFI->getArgInfo().getPreloadDescriptorsForArgIdx(Arg.getArgNo());
813+
const SmallVectorImpl<const KernArgPreload::KernArgPreloadDescriptor *>
814+
&PreloadDescs =
815+
MFI->getArgInfo().getPreloadDescriptorsForArgIdx(Arg.getArgNo());
814816
for (auto &Desc : PreloadDescs) {
815817
if (!PreloadRegisters.empty())
816-
PreloadRegisters += " ";
818+
PreloadRegisters.push_back(' ');
817819

818-
for (unsigned I = 0; I < Desc->Regs.size(); ++I) {
819-
if (I > 0)
820-
PreloadRegisters += " ";
821-
PreloadRegisters += AMDGPUInstPrinter::getRegisterName(Desc->Regs[I]);
820+
for (const auto &Reg : Desc->Regs) {
821+
if (!PreloadRegisters.empty())
822+
PreloadRegisters.push_back(' ');
823+
PreloadRegisters += AMDGPUInstPrinter::getRegisterName(Reg);
822824
}
823825
}
824826
}

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