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Merge branch 'main' into add_spirv_backend_to_clang_sycl_linker_upstream
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‎clang/include/clang/Basic/arm_sme.td

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -296,6 +296,7 @@ multiclass MOP4<string mode, string za, string t, string i, list<ImmCheck> check
296296
def _1x1 : Inst<"svmop4" # mode # "[_1x1]" # za # "[_{d}_{d}]", "vidd", t, MergeNone, i # "_1x1", [IsInOutZA, IsStreaming], checks>;
297297
def _1x2 : Inst<"svmop4" # mode # "[_1x2]" # za # "[_{d}_{d}]", "vid2", t, MergeNone, i # "_1x2", [IsInOutZA, IsStreaming], checks>;
298298
def _2x1 : Inst<"svmop4" # mode # "[_2x1]" # za # "[_{d}_{d}]", "vi2d", t, MergeNone, i # "_2x1", [IsInOutZA, IsStreaming], checks>;
299+
def _2x2 : Inst<"svmop4" # mode # "[_2x2]" # za # "[_{d}_{d}]", "vi22", t, MergeNone, i # "_2x2", [IsInOutZA, IsStreaming], checks>;
299300
}
300301

301302
let SMETargetGuard = "sme2,sme-mop4" in {
@@ -355,6 +356,10 @@ multiclass SUMOP4<string mode, string za, string t, string i, list<ImmCheck> che
355356
"vi2u", t, MergeNone, "aarch64_sme_sumop4" # mode # i # "_wide_2x1",
356357
[IsStreaming, IsInOutZA],
357358
checks>;
359+
def _2x2 : SInst<"svmop4" # mode # "[_2x2]" # za # "[_{d}_{3}]",
360+
"vi2.x2.u", t, MergeNone, "aarch64_sme_sumop4" # mode # i # "_wide_2x2",
361+
[IsStreaming, IsInOutZA],
362+
checks>;
358363
}
359364

360365
multiclass USMOP4<string mode, string za, string t, string i, list<ImmCheck> checks> {
@@ -370,6 +375,10 @@ multiclass USMOP4<string mode, string za, string t, string i, list<ImmCheck> che
370375
"vi2x", t, MergeNone, "aarch64_sme_usmop4" # mode # i # "_wide_2x1",
371376
[IsStreaming, IsInOutZA],
372377
checks>;
378+
def _2x2 : SInst<"svmop4" # mode # "[_2x2]" # za # "[_{d}_{3}]",
379+
"vi2.u2.x", t, MergeNone, "aarch64_sme_usmop4" # mode # i # "_wide_2x2",
380+
[IsStreaming, IsInOutZA],
381+
checks>;
373382
}
374383

375384
let SMETargetGuard = "sme2,sme-mop4" in {

‎clang/test/CodeGen/AArch64/sme2-intrinsics/acle_sme2_mop4_2x2.c

Lines changed: 466 additions & 0 deletions
Large diffs are not rendered by default.

‎clang/test/Sema/aarch64-sme2p2-instrinsics/acle_sme2p2_imm.cpp

Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -250,3 +250,80 @@ void tests_mop4_imm_f64_f64_2x1(svfloat64x2_t zn, svfloat64_t zm) __arm_streamin
250250
svmop4s_2x1_za64_f64_f64(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 7]}}
251251
return;
252252
}
253+
254+
void tests_mop4_imm_s8_s8_2x2(svint8x2_t zn, svint8x2_t zm) __arm_streaming __arm_inout("za") {
255+
svmop4a_2x2_za32_s8_s8(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
256+
svmop4s_2x2_za32_s8_s8(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
257+
return;
258+
}
259+
260+
void tests_mop4_imm_u8_u8_2x2(svuint8x2_t zn, svuint8x2_t zm) __arm_streaming __arm_inout("za") {
261+
svmop4a_2x2_za32_u8_u8(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
262+
svmop4s_2x2_za32_u8_u8(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
263+
return;
264+
}
265+
266+
void tests_mop4_imm_s8_u8_2x2(svint8x2_t zn, svuint8x2_t zm) __arm_streaming __arm_inout("za") {
267+
svmop4a_2x2_za32_s8_u8(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
268+
svmop4s_2x2_za32_s8_u8(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
269+
svmop4a_2x2_za32_u8_s8(-1, zm, zn); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
270+
svmop4s_2x2_za32_u8_s8(-1, zm, zn); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
271+
return;
272+
}
273+
274+
void tests_mop4_imm_s16_s16_2x2(svint16x2_t zn, svint16x2_t zm) __arm_streaming __arm_inout("za") {
275+
svmop4a_2x2_za32_s16_s16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
276+
svmop4s_2x2_za32_s16_s16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
277+
278+
svmop4a_2x2_za64_s16_s16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 7]}}
279+
svmop4s_2x2_za64_s16_s16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 7]}}
280+
return;
281+
}
282+
283+
void tests_mop4_imm_u16_u16_2x2(svuint16x2_t zn, svuint16x2_t zm) __arm_streaming __arm_inout("za") {
284+
svmop4a_2x2_za32_u16_u16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
285+
svmop4s_2x2_za32_u16_u16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
286+
287+
svmop4a_2x2_za64_u16_u16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 7]}}
288+
svmop4s_2x2_za64_u16_u16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 7]}}
289+
return;
290+
}
291+
292+
void tests_mop4_imm_s16_u16_2x2(svint16x2_t zn, svuint16x2_t zm) __arm_streaming __arm_inout("za") {
293+
svmop4a_2x2_za64_s16_u16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 7]}}
294+
svmop4s_2x2_za64_s16_u16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 7]}}
295+
svmop4a_2x2_za64_u16_s16(-1, zm, zn); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 7]}}
296+
svmop4s_2x2_za64_u16_s16(-1, zm, zn); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 7]}}
297+
return;
298+
}
299+
300+
void tests_mop4_imm_f16_f16_2x2(svfloat16x2_t zn, svfloat16x2_t zm) __arm_streaming __arm_inout("za") {
301+
svmop4a_2x2_za32_f16_f16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
302+
svmop4s_2x2_za32_f16_f16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
303+
304+
svmop4a_2x2_za16_f16_f16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 1]}}
305+
svmop4s_2x2_za16_f16_f16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 1]}}
306+
return;
307+
}
308+
309+
void tests_mop4_imm_bf16_bf16_2x2(svbfloat16x2_t zn, svbfloat16x2_t zm) __arm_streaming __arm_inout("za") {
310+
svmop4a_2x2_za32_bf16_bf16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
311+
svmop4s_2x2_za32_bf16_bf16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
312+
313+
svmop4a_2x2_za16_bf16_bf16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 1]}}
314+
svmop4s_2x2_za16_bf16_bf16(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 1]}}
315+
return;
316+
317+
}
318+
319+
void tests_mop4_imm_f32_f32_2x2(svfloat32x2_t zn, svfloat32x2_t zm) __arm_streaming __arm_inout("za") {
320+
svmop4a_2x2_za32_f32_f32(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
321+
svmop4s_2x2_za32_f32_f32(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 3]}}
322+
return;
323+
}
324+
325+
void tests_mop4_imm_f64_f64_2x2(svfloat64x2_t zn, svfloat64x2_t zm) __arm_streaming __arm_inout("za") {
326+
svmop4a_2x2_za64_f64_f64(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 7]}}
327+
svmop4s_2x2_za64_f64_f64(-1, zn, zm); // expected-error {{argument value 18446744073709551615 is outside the valid range [0, 7]}}
328+
return;
329+
}

‎flang-rt/lib/runtime/stop.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -80,7 +80,7 @@ static void CloseAllExternalUnits(const char *why) {
8080
if (code != EXIT_SUCCESS) {
8181
std::printf(": code %d\n", code);
8282
}
83-
std::printf('\n');
83+
std::printf("\n");
8484
}
8585
#if defined(__CUDACC__)
8686
// NVCC supports __trap().

‎libc/test/src/math/exhaustive/hypotf_test.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -49,11 +49,15 @@ struct HypotfChecker : public virtual LIBC_NAMESPACE::testing::Test {
4949
}
5050
};
5151

52-
using LlvmLibcHypotfExhaustiveTest = LlvmLibcExhaustiveMathTest<HypotfChecker>;
52+
using LlvmLibcHypotfExhaustiveTest =
53+
LlvmLibcExhaustiveMathTest<HypotfChecker, /*Increment=*/1>;
5354

5455
// Range of the first input: [2^23, 2^24];
5556
static constexpr uint32_t START = (23U + 127U) << 23;
56-
static constexpr uint32_t STOP = (24U + 127U) << 23;
57+
// static constexpr uint32_t STOP = (24U + 127U) << 23;
58+
// Use a smaller range for automated tests, since the full range takes too long
59+
// and should only be run manually.
60+
static constexpr uint32_t STOP = ((23U + 127U) << 23) + 1024U;
5761

5862
TEST_F(LlvmLibcHypotfExhaustiveTest, PositiveRange) {
5963
test_full_range_all_roundings(START, STOP);

‎llvm/include/llvm/IR/IntrinsicsAArch64.td

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3077,13 +3077,22 @@ let TargetPrefix = "aarch64" in {
30773077
LLVMMatchType<0>,
30783078
LLVMMatchType<0>], [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects]>;
30793079

3080+
class SME_OuterProduct_QuarterTile_Multi_Multi
3081+
: DefaultAttrsIntrinsic<[],
3082+
[llvm_i32_ty,
3083+
llvm_anyvector_ty,
3084+
LLVMMatchType<0>,
3085+
LLVMMatchType<0>,
3086+
LLVMMatchType<0>], [ImmArg<ArgIndex<0>>, IntrNoMem, IntrHasSideEffects]>;
3087+
30803088
// 2-way and 4-way multi-vector signed/unsigned Quarter Tile Quarter Product A/S
30813089
foreach mode = ["s", "a"] in {
30823090
foreach za = ["", "_za64"] in {
30833091
foreach ty = ["s", "u", "su", "us"] in {
30843092
def int_aarch64_sme_ # ty # "mop4" # mode # za # "_wide_1x1" : SME_OuterProduct_QuarterTile_Single_Single;
30853093
def int_aarch64_sme_ # ty # "mop4" # mode # za # "_wide_1x2" : SME_OuterProduct_QuarterTile_Single_Multi;
30863094
def int_aarch64_sme_ # ty # "mop4" # mode # za # "_wide_2x1" : SME_OuterProduct_QuarterTile_Single_Multi;
3095+
def int_aarch64_sme_ # ty # "mop4" # mode # za # "_wide_2x2" : SME_OuterProduct_QuarterTile_Multi_Multi;
30873096
}
30883097
}
30893098
}
@@ -3094,6 +3103,7 @@ let TargetPrefix = "aarch64" in {
30943103
def int_aarch64_sme_mop4 # mode # wide # "_1x1" : SME_OuterProduct_QuarterTile_Single_Single;
30953104
def int_aarch64_sme_mop4 # mode # wide # "_1x2" : SME_OuterProduct_QuarterTile_Single_Multi;
30963105
def int_aarch64_sme_mop4 # mode # wide # "_2x1" : SME_OuterProduct_QuarterTile_Single_Multi;
3106+
def int_aarch64_sme_mop4 # mode # wide # "_2x2" : SME_OuterProduct_QuarterTile_Multi_Multi;
30973107
}
30983108
}
30993109

‎llvm/lib/MC/WasmObjectWriter.cpp

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1785,6 +1785,18 @@ uint64_t WasmObjectWriter::writeOneObject(MCAssembler &Asm,
17851785
WS.setIndex(InvalidIndex);
17861786
continue;
17871787
}
1788+
// In bitcode generated by split-LTO-unit mode in ThinLTO, these lines can
1789+
// appear:
1790+
// module asm ".lto_set_conditional symbolA,symbolA.[moduleId]"
1791+
// ...
1792+
// (Here [moduleId] will be replaced by a real module hash ID)
1793+
//
1794+
// Here the original symbol (symbolA here) has been renamed to the new name
1795+
// created by attaching its module ID, so the original symbol does not
1796+
// appear in the bitcode anymore, and thus not in DataLocations. We should
1797+
// ignore them.
1798+
if (WS.isData() && WS.isDefined() && !DataLocations.count(&WS))
1799+
continue;
17881800
LLVM_DEBUG(dbgs() << "adding to symtab: " << WS << "\n");
17891801

17901802
uint32_t Flags = 0;

‎llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td

Lines changed: 4 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -392,15 +392,13 @@ def AArch64splice : SDNode<"AArch64ISD::SPLICE", SDT_AArch64Arith>;
392392

393393
def reinterpret_cast : SDNode<"AArch64ISD::REINTERPRET_CAST", SDTUnaryOp>;
394394

395+
let HasOneUse = 1 in
395396
def AArch64mul_p_oneuse : PatFrag<(ops node:$pred, node:$src1, node:$src2),
396-
(AArch64mul_p node:$pred, node:$src1, node:$src2), [{
397-
return N->hasOneUse();
398-
}]>;
397+
(AArch64mul_p node:$pred, node:$src1, node:$src2)>;
399398

399+
let HasOneUse = 1 in
400400
def AArch64fmul_p_oneuse : PatFrag<(ops node:$pred, node:$src1, node:$src2),
401-
(AArch64fmul_p node:$pred, node:$src1, node:$src2), [{
402-
return N->hasOneUse();
403-
}]>;
401+
(AArch64fmul_p node:$pred, node:$src1, node:$src2)>;
404402

405403

406404
def AArch64fabd_p : PatFrags<(ops node:$pg, node:$op1, node:$op2),

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