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fixup! respond to review
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@michaelmaitland
michaelmaitland committed Dec 6, 2024
1 parent f6cb23e commit 5c3e574
Showing 1 changed file with 15 additions and 15 deletions.
30 changes: 15 additions & 15 deletions llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -1275,18 +1275,18 @@ define <vscale x 4 x i32> @vmacc_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b
; NOVLOPT-NEXT: vsetvli a1, zero, e32, m2, tu, ma
; NOVLOPT-NEXT: vmacc.vv v8, v8, v10
; NOVLOPT-NEXT: vsetvli zero, a0, e32, m2, ta, ma
; NOVLOPT-NEXT: vmul.vv v8, v8, v10
; NOVLOPT-NEXT: vadd.vv v8, v8, v10
; NOVLOPT-NEXT: ret
;
; VLOPT-LABEL: vmacc_vv:
; VLOPT: # %bb.0:
; VLOPT-NEXT: vsetvli zero, a0, e32, m2, tu, ma
; VLOPT-NEXT: vmacc.vv v8, v8, v10
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma
; VLOPT-NEXT: vmul.vv v8, v8, v10
; VLOPT-NEXT: vadd.vv v8, v8, v10
; VLOPT-NEXT: ret
%1 = call <vscale x 4 x i32> @llvm.riscv.vmacc.nxv4i32.nxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %a, <vscale x 4 x i32> %b, iXLen -1, iXLen 0)
%2 = call <vscale x 4 x i32> @llvm.riscv.vmul.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %b, iXLen %vl)
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %b, iXLen %vl)
ret <vscale x 4 x i32> %2
}

Expand Down Expand Up @@ -1314,23 +1314,23 @@ define <vscale x 4 x i32> @vmacc_vv_use(<vscale x 4 x i32> %a, <vscale x 4 x i32
define <vscale x 4 x i32> @vmacc_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
; NOVLOPT-LABEL: vmacc_vx:
; NOVLOPT: # %bb.0:
; NOVLOPT-NEXT: vmv2r.v v10, v8
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma
; NOVLOPT-NEXT: vmv2r.v v10, v8
; NOVLOPT-NEXT: vmacc.vx v10, a0, v8
; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
; NOVLOPT-NEXT: vmul.vv v8, v10, v8
; NOVLOPT-NEXT: vadd.vv v8, v10, v8
; NOVLOPT-NEXT: ret
;
; VLOPT-LABEL: vmacc_vx:
; VLOPT: # %bb.0:
; VLOPT-NEXT: vmv2r.v v10, v8
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, tu, ma
; VLOPT-NEXT: vmv2r.v v10, v8
; VLOPT-NEXT: vmacc.vx v10, a0, v8
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma
; VLOPT-NEXT: vmul.vv v8, v10, v8
; VLOPT-NEXT: vadd.vv v8, v10, v8
; VLOPT-NEXT: ret
%1 = call <vscale x 4 x i32> @llvm.riscv.vmacc.nxv4i32.nxv4i32(<vscale x 4 x i32> %a, i32 %b, <vscale x 4 x i32> %a, iXLen -1, iXLen 0)
%2 = call <vscale x 4 x i32> @llvm.riscv.vmul.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %a, iXLen %vl)
%1 = call <vscale x 4 x i32> @llvm.riscv.vmacc.nxv4i32.i32(<vscale x 4 x i32> %a, i32 %b, <vscale x 4 x i32> %a, iXLen -1, iXLen 0)
%2 = call <vscale x 4 x i32> @llvm.riscv.vadd.nxv4i32.nxv4i32(<vscale x 4 x i32> poison, <vscale x 4 x i32> %1, <vscale x 4 x i32> %a, iXLen %vl)
ret <vscale x 4 x i32> %2
}

Expand Down Expand Up @@ -1358,17 +1358,17 @@ define <vscale x 4 x i32> @vmadd_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b
define <vscale x 4 x i32> @vmadd_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
; NOVLOPT-LABEL: vmadd_vx:
; NOVLOPT: # %bb.0:
; NOVLOPT-NEXT: vmv2r.v v10, v8
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma
; NOVLOPT-NEXT: vmv2r.v v10, v8
; NOVLOPT-NEXT: vmadd.vx v10, a0, v8
; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
; NOVLOPT-NEXT: vmul.vv v8, v10, v8
; NOVLOPT-NEXT: ret
;
; VLOPT-LABEL: vmadd_vx:
; VLOPT: # %bb.0:
; VLOPT-NEXT: vmv2r.v v10, v8
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, tu, ma
; VLOPT-NEXT: vmv2r.v v10, v8
; VLOPT-NEXT: vmadd.vx v10, a0, v8
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma
; VLOPT-NEXT: vmul.vv v8, v10, v8
Expand Down Expand Up @@ -1402,17 +1402,17 @@ define <vscale x 4 x i32> @vnmsac_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %
define <vscale x 4 x i32> @vnmsac_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
; NOVLOPT-LABEL: vnmsac_vx:
; NOVLOPT: # %bb.0:
; NOVLOPT-NEXT: vmv2r.v v10, v8
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma
; NOVLOPT-NEXT: vmv2r.v v10, v8
; NOVLOPT-NEXT: vnmsac.vx v10, a0, v8
; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
; NOVLOPT-NEXT: vmul.vv v8, v10, v8
; NOVLOPT-NEXT: ret
;
; VLOPT-LABEL: vnmsac_vx:
; VLOPT: # %bb.0:
; VLOPT-NEXT: vmv2r.v v10, v8
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, tu, ma
; VLOPT-NEXT: vmv2r.v v10, v8
; VLOPT-NEXT: vnmsac.vx v10, a0, v8
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma
; VLOPT-NEXT: vmul.vv v8, v10, v8
Expand Down Expand Up @@ -1446,17 +1446,17 @@ define <vscale x 4 x i32> @vnmsub_vv(<vscale x 4 x i32> %a, <vscale x 4 x i32> %
define <vscale x 4 x i32> @vnmsub_vx(<vscale x 4 x i32> %a, i32 %b, iXLen %vl) {
; NOVLOPT-LABEL: vnmsub_vx:
; NOVLOPT: # %bb.0:
; NOVLOPT-NEXT: vmv2r.v v10, v8
; NOVLOPT-NEXT: vsetvli a2, zero, e32, m2, tu, ma
; NOVLOPT-NEXT: vmv2r.v v10, v8
; NOVLOPT-NEXT: vnmsub.vx v10, a0, v8
; NOVLOPT-NEXT: vsetvli zero, a1, e32, m2, ta, ma
; NOVLOPT-NEXT: vmul.vv v8, v10, v8
; NOVLOPT-NEXT: ret
;
; VLOPT-LABEL: vnmsub_vx:
; VLOPT: # %bb.0:
; VLOPT-NEXT: vmv2r.v v10, v8
; VLOPT-NEXT: vsetvli zero, a1, e32, m2, tu, ma
; VLOPT-NEXT: vmv2r.v v10, v8
; VLOPT-NEXT: vnmsub.vx v10, a0, v8
; VLOPT-NEXT: vsetvli zero, zero, e32, m2, ta, ma
; VLOPT-NEXT: vmul.vv v8, v10, v8
Expand Down

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