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urvi-rav
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Update LIT test cases
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3 files changed

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-99
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3 files changed

+281
-99
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‎clang/lib/Parse/ParseOpenMP.cpp

+1-2
Original file line numberDiff line numberDiff line change
@@ -2764,8 +2764,7 @@ StmtResult Parser::ParseOpenMPDeclarativeOrExecutableDirective(
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Diag(Tok, diag::err_omp_unknown_clause)
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<< PP.getSpelling(Tok) << "metadirective";
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}
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if (getLangOpts().OpenMP < 52 &&
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CKind == OMPC_otherwise) {
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if (getLangOpts().OpenMP < 52 && CKind == OMPC_otherwise) {
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Diag(Tok, diag::err_omp_unexpected_clause)
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<< PP.getSpelling(Tok) << "metadirective";
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}

‎clang/test/OpenMP/metadirective_default.cpp

+198
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,198 @@
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// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s
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// expected-no-diagnostics
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#ifndef HEADER
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#define HEADER
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void func1() {
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#pragma omp metadirective when(user = {condition(0)} \
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: parallel for)
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for (int i = 0; i < 100; i++)
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;
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#pragma omp metadirective when(user = {condition(0)} \
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: parallel for) \
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when(implementation = {extension(match_none)} \
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: parallel) default(parallel for)
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for (int i = 0; i < 100; i++)
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;
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}
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// CHECK-LABEL: define dso_local void @_Z5func1v()
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// CHECK: entry
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// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store i32 0, ptr [[I]], align 4
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// CHECK-NEXT: br label %[[FOR_COND:.*]]
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// CHECK: [[FOR_COND]]:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
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// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
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// CHECK-NEXT: br i1 [[CMP]], label %[[FOR_BODY:.*]], label %[[FOR_END:.*]]
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// CHECK: [[FOR_BODY]]:
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// CHECK-NEXT: br label %[[FOR_INC:.*]]
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// CHECK: [[FOR_INC]]:
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
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// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
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// CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4
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// CHECK-NEXT: br label %[[FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
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// CHECK: [[FOR_END]]:
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// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @1, i32 0, ptr @_Z5func1v.omp_outlined)
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// CHECK-NEXT: ret void
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// CHECK-NEXT: }
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// CHECK-LABEL: define internal void @_Z5func1v.omp_outlined
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// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]],
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// CHECK-SAME: ptr noalias noundef [[DOTBOUND_TID_:%.*]])
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// CHECK-NEXT: entry
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// CHECK-NEXT: [[GLOB_TID__ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[BOUND_TID__ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[GLOB_TID__ADDR]], align 8
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// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[BOUND_TID__ADDR]], align 8
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// CHECK-NEXT: store i32 0, ptr [[I]], align 4
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// CHECK-NEXT: br label %for.cond
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// CHECK:for.cond:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
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// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
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// CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
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// CHECK:for.body:
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// CHECK-NEXT: br label [[FOR_INC:%.*]]
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// CHECK:for.inc:
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
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// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
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// CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4
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// CHECK-NEXT: br label [[FOR_COND:%.*]]
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// CHECK:for.end:
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// CHECK-NEXT: ret void
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// CHECK-NEXT:}
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void func2() {
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#pragma omp metadirective when(user = {condition(1)} \
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: parallel for)
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for (int i = 0; i < 100; i++)
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;
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}
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// CHECK-LABEL: define dso_local void @_Z5func2v()
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// CHECK: entry
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// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 0, ptr @_Z5func2v.omp_outlined)
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// CHECK-NEXT: ret void
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// CHECK-NEXT: }
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// CHECK-LABEL: define internal void @_Z5func2v.omp_outlined
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// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]],
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// CHECK-SAME: ptr noalias noundef [[DOTBOUND_TID_:%.*]])
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// CHECK-NEXT: entry
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// CHECK-NEXT: [[GLOB_TID__ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[BOUND_TID__ADDR:%.*]] = alloca ptr, align 8
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// CHECK: [[OMP_IV:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[OMP_LB:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[OMP_UB:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[OMP_STRIDE:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[OMP_IS_LAST:%.*]] = alloca i32, align 4
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// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[GLOB_TID__ADDR]], align 8
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// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[BOUND_TID__ADDR]], align 8
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// CHECK: store i32 0, ptr [[OMP_LB:%.*]], align 4
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// CHECK-NEXT: store i32 99, ptr [[OMP_UB:%.*]], align 4
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// CHECK-NEXT: store i32 1, ptr [[OMP_STRIDE:%.*]], align 4
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// CHECK-NEXT: store i32 0, ptr [[OMP_IS_LAST:%.*]], align 4
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// CHECK-NEXT: [[TID_PTR:%.*]] = load ptr, ptr [[GLOBAL_TID_ADDR:%.*]], align 8
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// CHECK-NEXT: [[TID_VAL:%.*]] = load i32, ptr [[TID_PTR]], align 4
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// CHECK-NEXT: call void @__kmpc_for_static_init_4(ptr @2, i32 [[TID_VAL]], i32 34, ptr [[OMP_IS_LAST]], ptr [[OMP_LB]], ptr [[OMP_UB]], ptr [[OMP_STRIDE]], i32 1, i32 1)
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// CHECK-NEXT: [[UB_VAL:%.*]] = load i32, ptr [[OMP_UB]], align 4
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// CHECK-NEXT: [[CMP:%.*]] = icmp sgt i32 [[UB_VAL]], 99
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// CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
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// CHECK: cond.true:
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// CHECK-NEXT: br label [[COND_END:%.*]]
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// CHECK:cond.false:
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// CHECK-NEXT: [[UB_VAL:%.*]] = load i32, ptr [[OMP_UB:%.*]], align 4
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// CHECK-NEXT: br label [[COND_END]]
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// CHECK:cond.end:
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// CHECK-NEXT: [[COND_PHI:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[UB_VAL]], [[COND_FALSE]] ]
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// CHECK-NEXT: store i32 [[COND_PHI]], ptr [[OMP_UB]], align 4
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// CHECK-NEXT: [[LB_VAL:%.*]] = load i32, ptr [[OMP_LB]], align 4
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// CHECK-NEXT: store i32 [[LB_VAL]], ptr [[OMP_IV]], align 4
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// CHECK-NEXT: br label [[OMP_FOR_COND:%.*]]
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// CHECK:omp.inner.for.cond:
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// CHECK-NEXT: [[IV_VAL:%.*]] = load i32, ptr [[OMP_IV]], align 4
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// CHECK-NEXT: [[UB_VAL2:%.*]] = load i32, ptr [[OMP_UB]], align 4
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// CHECK-NEXT: [[CMP1:%.*]] = icmp sle i32 [[IV_VAL]], [[UB_VAL2]]
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// CHECK-NEXT: br i1 [[CMP1]], label [[OMP_FOR_BODY:%.*]], label [[OMP_FOR_END:%.*]]
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// CHECK:omp.inner.for.body:
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// CHECK-NEXT: [[IV_VAL2:%.*]] = load i32, ptr [[OMP_IV]], align 4
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// CHECK-NEXT: [[MUL:%.*]] = mul nsw i32 [[IV_VAL2]], 1
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// CHECK-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
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// CHECK-NEXT: store i32 [[ADD]], ptr [[I]], align 4
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// CHECK-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
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// CHECK:omp.body.continue:
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// CHECK-NEXT: br label [[OMP_FOR_INC:%.*]]
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// CHECK:omp.inner.for.inc:
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// CHECK-NEXT: [[IV_VAL3:%.*]] = load i32, ptr [[OMP_IV]], align 4
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// CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[IV_VAL3]], 1
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// CHECK-NEXT: store i32 [[ADD2]], ptr [[OMP_IV]], align 4
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// CHECK-NEXT: br label [[OMP_FOR_COND]]
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// CHECK:omp.inner.for.end:
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// CHECK-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
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// CHECK:omp.loop.exit:
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// CHECK-NEXT: call void @__kmpc_for_static_fini(ptr @2, i32 [[TID:%.*]])
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// CHECK-NEXT: ret void
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// CHECK-NEXT: }
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void func3() {
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#pragma omp metadirective when(user = {condition(0)} \
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: parallel for) \
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when(implementation = {extension(match_none)} \
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: parallel) default(parallel for)
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for (int i = 0; i < 100; i++)
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;
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}
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// CHECK-LABEL: define dso_local void @_Z5func3v()
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// CHECK: entry
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// CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @1, i32 0, ptr @_Z5func3v.omp_outlined)
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// CHECK-NEXT: ret void
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// CHECK-NEXT: }
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// CHECK-LABEL: define internal void @_Z5func3v.omp_outlined
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// CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]],
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// CHECK-SAME: ptr noalias noundef [[DOTBOUND_TID_:%.*]])
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// CHECK-NEXT: entry
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// CHECK-NEXT: [[GLOB_TID__ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[BOUND_TID__ADDR:%.*]] = alloca ptr, align 8
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// CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
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// CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[GLOB_TID__ADDR]], align 8
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// CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[BOUND_TID__ADDR]], align 8
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// CHECK-NEXT: store i32 0, ptr [[I]], align 4
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// CHECK-NEXT: br label %for.cond
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// CHECK:for.cond:
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// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
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// CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 100
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// CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
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// CHECK:for.body:
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// CHECK-NEXT: br label [[FOR_INC:%.*]]
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// CHECK:for.inc:
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// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[I]], align 4
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// CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
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// CHECK-NEXT: store i32 [[INC]], ptr [[I]], align 4
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// CHECK-NEXT: br label [[FOR_COND:%.*]]
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// CHECK:for.end:
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// CHECK-NEXT: ret void
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// CHECK-NEXT:}
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#endif

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