@@ -2599,14 +2599,14 @@ static bool interp__builtin_elementwise_maxmin(InterpState &S, CodePtr OpPC,
25992599}
26002600
26012601static bool interp__builtin_ia32_pmadd (InterpState &S, CodePtr OpPC,
2602- const CallExpr *Call,
2603- unsigned BuiltinID) {
2602+ const CallExpr *Call,
2603+ unsigned BuiltinID) {
26042604 assert (Call->getArg (0 )->getType ()->isVectorType () &&
26052605 Call->getArg (1 )->getType ()->isVectorType ());
26062606 const Pointer &RHS = S.Stk .pop <Pointer>();
26072607 const Pointer &LHS = S.Stk .pop <Pointer>();
26082608 const Pointer &Dst = S.Stk .peek <Pointer>();
2609-
2609+
26102610 const auto *VT = Call->getArg (0 )->getType ()->castAs <VectorType>();
26112611 PrimType ElemT = *S.getContext ().classify (VT->getElementType ());
26122612 unsigned NumElems = VT->getNumElements ();
@@ -2623,11 +2623,11 @@ static bool interp__builtin_ia32_pmadd(InterpState &S, CodePtr OpPC,
26232623 APSInt RHS1;
26242624 INT_TYPE_SWITCH_NO_BOOL (ElemT, {
26252625 U_LHS0 = LHS.elem <T>(I).toAPSInt ();
2626- U_LHS1 = LHS.elem <T>(I+ 1 ).toAPSInt ();
2626+ U_LHS1 = LHS.elem <T>(I + 1 ).toAPSInt ();
26272627 LHS0 = LHS.elem <T>(I).toAPSInt ();
2628- LHS1 = LHS.elem <T>(I+ 1 ).toAPSInt ();
2628+ LHS1 = LHS.elem <T>(I + 1 ).toAPSInt ();
26292629 RHS0 = RHS.elem <T>(I).toAPSInt ();
2630- RHS1 = RHS.elem <T>(I+ 1 ).toAPSInt ();
2630+ RHS1 = RHS.elem <T>(I + 1 ).toAPSInt ();
26312631 });
26322632
26332633 APSInt Mul0;
@@ -3429,7 +3429,7 @@ bool InterpretBuiltin(InterpState &S, CodePtr OpPC, const CallExpr *Call,
34293429 case clang::X86::BI__builtin_ia32_pmaddubsw256:
34303430 case clang::X86::BI__builtin_ia32_pmaddubsw512:
34313431 return interp__builtin_ia32_pmadd (S, OpPC, Call, BuiltinID);
3432-
3432+
34333433 case clang::X86::BI__builtin_ia32_pmaddwd128:
34343434 case clang::X86::BI__builtin_ia32_pmaddwd256:
34353435 case clang::X86::BI__builtin_ia32_pmaddwd512:
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