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[clang][PGO] Apply artificial DebugLoc to llvm.instrprof.increment instructions (#90717)
Prior to this change the debug-location for the `llvm.instrprof.increment` intrinsic was set to whatever the current DIBuilder's current debug location was set to. This meant that for switch-statements, a counter's location was set to the previous case's debug-location, causing confusing stepping behaviour in debuggers. This patch makes sure we attach a dummy debug-location for the increment instructions. rdar://123050737
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clang/lib/CodeGen/CodeGenFunction.h

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@@ -1648,8 +1648,10 @@ class CodeGenFunction : public CodeGenTypeCache {
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void incrementProfileCounter(const Stmt *S, llvm::Value *StepV = nullptr) {
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if (CGM.getCodeGenOpts().hasProfileClangInstr() &&
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!CurFn->hasFnAttribute(llvm::Attribute::NoProfile) &&
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!CurFn->hasFnAttribute(llvm::Attribute::SkipProfile))
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!CurFn->hasFnAttribute(llvm::Attribute::SkipProfile)) {
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auto AL = ApplyDebugLocation::CreateArtificial(*this);
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PGO.emitCounterSetOrIncrement(Builder, S, StepV);
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}
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PGO.setCurrentStmt(S);
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}
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// Tests that we don't attach misleading debug locations to llvm.instrprof.increment
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// counters.
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// RUN: %clang_cc1 -x c++ %s -debug-info-kind=standalone -triple %itanium_abi_triple -main-file-name debug-info-instr_profile_switch.cpp -std=c++11 -o - -emit-llvm -fprofile-instrument=clang | FileCheck %s
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int main(int argc, const char *argv[]) {
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switch(argc) {
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case 0:
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return 0;
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case 1:
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return 1;
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}
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}
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// CHECK: define {{.*}} @main(i32 noundef %argc, ptr noundef %argv) #0 !dbg ![[MAIN_SCOPE:[0-9]+]]
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// CHECK: switch i32 {{.*}}, label {{.*}} [
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// CHECK-NEXT: i32 0, label %[[CASE1_LBL:[a-z0-9.]+]]
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// CHECK-NEXT: i32 1, label %[[CASE2_LBL:[a-z0-9.]+]]
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// CHECK-NEXT: ], !dbg ![[SWITCH_LOC:[0-9]+]]
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// CHECK: [[CASE1_LBL]]:
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// CHECK-NEXT: %{{.*}} = load i64, ptr getelementptr inbounds ({{.*}}, ptr @__profc_main, {{.*}}), align {{.*}}, !dbg ![[CTR_LOC:[0-9]+]]
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// CHECK-NEXT: %{{.*}} = add {{.*}}, !dbg ![[CTR_LOC]]
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// CHECK-NEXT: store i64 {{.*}}, ptr getelementptr inbounds ({{.*}}, ptr @__profc_main, {{.*}}), align {{.*}}, !dbg ![[CTR_LOC]]
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// CHECK-NEXT: store i32 0, {{.*}} !dbg ![[CASE1_LOC:[0-9]+]]
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// CHECK-NEXT: br label {{.*}}, !dbg ![[CASE1_LOC]]
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// CHECK: [[CASE2_LBL]]:
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// CHECK-NEXT: %{{.*}} = load i64, ptr getelementptr inbounds ({{.*}}, ptr @__profc_main, {{.*}}), align {{.*}}, !dbg ![[CTR_LOC]]
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// CHECK-NEXT: %{{.*}} = add {{.*}}, !dbg ![[CTR_LOC]]
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// CHECK-NEXT: store i64 {{.*}}, ptr getelementptr inbounds ({{.*}}, ptr @__profc_main, {{.*}}), align {{.*}}, !dbg ![[CTR_LOC]]
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// CHECK-NEXT: store i32 1, {{.*}} !dbg ![[CASE2_LOC:[0-9]+]]
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// CHECK-NEXT: br label {{.*}}, !dbg ![[CASE2_LOC]]
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// CHECK: ![[SWITCH_LOC]] = !DILocation({{.*}}, scope: ![[MAIN_SCOPE]])
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// CHECK: ![[CTR_LOC]] = !DILocation(line: 0, scope: ![[BLOCK_SCOPE:[0-9]+]])
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// CHECK: ![[BLOCK_SCOPE]] = distinct !DILexicalBlock(scope: ![[MAIN_SCOPE]]
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// CHECK: ![[CASE1_LOC]] = !DILocation(line: {{.*}}, column: {{.*}}, scope: ![[BLOCK_SCOPE]])
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// CHECK: ![[CASE2_LOC]] = !DILocation(line: {{.*}}, column: {{.*}}, scope: ![[BLOCK_SCOPE]])

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