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[BOLT][RISCV] Implement TLS le/ie relocations
Handle the following relocations related to TLS local-exec and initial-exec: - R_RISCV_TLS_GOT_HI20 - R_RISCV_TPREL_HI20 - R_RISCV_TPREL_ADD - R_RISCV_TPREL_LO12_I - R_RISCV_TPREL_LO12_S In addition, GNU ld has a quirk where after TLS le relaxation, two unofficial relocation types may be emitted: - R_RISCV_TPREL_I - R_RISCV_TPREL_S Since they are unofficial (defined in the reserved range of relocation types), LLVM does not define them. Hence, I've defined them locally in BOLT in a private namespace.
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‎bolt/lib/Core/Relocation.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -20,6 +20,13 @@
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using namespace llvm;
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using namespace bolt;
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namespace ELFReserved {
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enum {
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R_RISCV_TPREL_I = 49,
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R_RISCV_TPREL_S = 50,
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};
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} // namespace ELFReserved
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Triple::ArchType Relocation::Arch;
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static bool isSupportedX86(uint64_t Type) {
@@ -111,6 +118,13 @@ static bool isSupportedRISCV(uint64_t Type) {
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case ELF::R_RISCV_LO12_I:
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case ELF::R_RISCV_LO12_S:
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case ELF::R_RISCV_64:
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case ELF::R_RISCV_TLS_GOT_HI20:
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case ELF::R_RISCV_TPREL_HI20:
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case ELF::R_RISCV_TPREL_ADD:
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case ELF::R_RISCV_TPREL_LO12_I:
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case ELF::R_RISCV_TPREL_LO12_S:
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case ELFReserved::R_RISCV_TPREL_I:
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case ELFReserved::R_RISCV_TPREL_S:
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return true;
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}
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}
@@ -214,6 +228,7 @@ static size_t getSizeForTypeRISCV(uint64_t Type) {
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return 4;
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case ELF::R_RISCV_64:
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case ELF::R_RISCV_GOT_HI20:
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case ELF::R_RISCV_TLS_GOT_HI20:
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// See extractValueRISCV for why this is necessary.
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return 8;
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}
@@ -532,6 +547,7 @@ static uint64_t extractValueRISCV(uint64_t Type, uint64_t Contents,
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case ELF::R_RISCV_BRANCH:
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return extractBImmRISCV(Contents);
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case ELF::R_RISCV_GOT_HI20:
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case ELF::R_RISCV_TLS_GOT_HI20:
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// We need to know the exact address of the GOT entry so we extract the
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// value from both the AUIPC and L[D|W]. We cannot rely on the symbol in the
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// relocation for this since it simply refers to the object that is stored
@@ -600,6 +616,7 @@ static bool isGOTRISCV(uint64_t Type) {
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default:
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return false;
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case ELF::R_RISCV_GOT_HI20:
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case ELF::R_RISCV_TLS_GOT_HI20:
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return true;
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}
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}
@@ -636,6 +653,14 @@ static bool isTLSRISCV(uint64_t Type) {
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switch (Type) {
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default:
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return false;
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case ELF::R_RISCV_TLS_GOT_HI20:
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case ELF::R_RISCV_TPREL_HI20:
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case ELF::R_RISCV_TPREL_ADD:
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case ELF::R_RISCV_TPREL_LO12_I:
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case ELF::R_RISCV_TPREL_LO12_S:
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case ELFReserved::R_RISCV_TPREL_I:
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case ELFReserved::R_RISCV_TPREL_S:
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return true;
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}
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}
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@@ -733,6 +758,7 @@ static bool isPCRelativeRISCV(uint64_t Type) {
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case ELF::R_RISCV_RVC_JUMP:
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case ELF::R_RISCV_RVC_BRANCH:
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case ELF::R_RISCV_32_PCREL:
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case ELF::R_RISCV_TLS_GOT_HI20:
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return true;
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}
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}

‎bolt/lib/Rewrite/RewriteInstance.cpp‎

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Original file line numberDiff line numberDiff line change
@@ -2332,7 +2332,8 @@ void RewriteInstance::handleRelocation(const SectionRef &RelocatedSection,
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if (BC->isX86())
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return;
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// The non-got related TLS relocations on AArch64 also could be skipped.
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// The non-got related TLS relocations on AArch64 and RISC-V also could be
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// skipped.
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if (!Relocation::isGOT(RType))
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return;
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}

‎bolt/lib/Target/RISCV/RISCVMCPlusBuilder.cpp‎

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@@ -46,6 +46,7 @@ class RISCVMCPlusBuilder : public MCPlusBuilder {
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case ELF::R_RISCV_HI20:
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case ELF::R_RISCV_LO12_I:
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case ELF::R_RISCV_LO12_S:
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case ELF::R_RISCV_TLS_GOT_HI20:
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return true;
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default:
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llvm_unreachable("Unexpected RISCV relocation type in code");
@@ -396,6 +397,7 @@ class RISCVMCPlusBuilder : public MCPlusBuilder {
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default:
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return Expr;
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case ELF::R_RISCV_GOT_HI20:
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case ELF::R_RISCV_TLS_GOT_HI20:
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// The GOT is reused so no need to create GOT relocations
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case ELF::R_RISCV_PCREL_HI20:
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return RISCVMCExpr::create(Expr, RISCVMCExpr::VK_RISCV_PCREL_HI, Ctx);

‎bolt/test/RISCV/Inputs/tls-le-gnu-ld.yaml‎

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--- !ELF
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FileHeader:
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Class: ELFCLASS64
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Data: ELFDATA2LSB
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Type: ET_EXEC
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Machine: EM_RISCV
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Entry: 0x100B0
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ProgramHeaders:
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- Type: PT_LOAD
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Flags: [ PF_X, PF_R ]
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FirstSec: .text
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LastSec: .text
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VAddr: 0x10000
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Align: 0x1000
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Offset: 0x0
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- Type: PT_TLS
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Flags: [ PF_R ]
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FirstSec: .tbss
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LastSec: .tbss
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VAddr: 0x110C0
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Align: 0x8
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Offset: 0xc0
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Sections:
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- Name: .text
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Type: SHT_PROGBITS
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Flags: [ SHF_ALLOC, SHF_EXECINSTR ]
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Address: 0x100B0
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AddressAlign: 0x4
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Content: '13000000832202002320520067800000'
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- Name: .tbss
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Type: SHT_NOBITS
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Flags: [ SHF_WRITE, SHF_ALLOC, SHF_TLS ]
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Address: 0x110C0
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AddressAlign: 0x8
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Size: 0x8
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- Name: .rela.text
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Type: SHT_RELA
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Flags: [ SHF_INFO_LINK ]
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Link: .symtab
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AddressAlign: 0x8
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Info: .text
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Relocations:
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- Offset: 0x100B4
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Type: R_RISCV_NONE
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- Offset: 0x100B4
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Type: R_RISCV_RELAX
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- Offset: 0x100B4
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Type: R_RISCV_NONE
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- Offset: 0x100B4
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Type: R_RISCV_RELAX
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- Offset: 0x100B4
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Symbol: i
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Type: 0x31
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- Offset: 0x100B4
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Type: R_RISCV_RELAX
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- Offset: 0x100B8
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Symbol: i
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Type: 0x32
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- Offset: 0x100B8
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Type: R_RISCV_RELAX
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- Type: SectionHeaderTable
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Sections:
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- Name: .text
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- Name: .rela.text
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- Name: .tbss
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- Name: .symtab
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- Name: .strtab
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- Name: .shstrtab
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Symbols:
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- Name: .text
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Type: STT_SECTION
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Section: .text
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Value: 0x100B0
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- Name: .tbss
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Type: STT_SECTION
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Section: .tbss
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Value: 0x110C0
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- Name: '__global_pointer$'
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Index: SHN_ABS
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Binding: STB_GLOBAL
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Value: 0x118C0
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- Name: i
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Type: STT_TLS
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Section: .tbss
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Binding: STB_GLOBAL
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Size: 0x8
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- Name: _start
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Section: .text
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Binding: STB_GLOBAL
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Value: 0x100B0
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Size: 0x10
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...

‎bolt/test/RISCV/reloc-tls.s‎

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// RUN: llvm-mc -triple riscv64 -filetype obj -o %t.o %s
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// RUN: ld.lld --emit-relocs -o %t %t.o
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// RUN: llvm-bolt --print-cfg --print-only=tls_le,tls_ie -o /dev/null %t \
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// RUN: | FileCheck %s
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// CHECK-LABEL: Binary Function "tls_le{{.*}}" after building cfg {
7+
// CHECK: lui a5, 0
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// CHECK-NEXT: add a5, a5, tp
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// CHECK-NEXT: lw t0, 0(a5)
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// CHECK-NEXT: sw t0, 0(a5)
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12+
// CHECK-LABEL: Binary Function "tls_ie" after building cfg {
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// CHECK-LABEL: .Ltmp0
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// CHECK: auipc a0, %pcrel_hi(__BOLT_got_zero+{{[0-9]+}})
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// CHECK-NEXT: ld a0, %pcrel_lo(.Ltmp0)(a0)
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.text
17+
.globl tls_le, _start
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.p2align 2
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tls_le:
20+
_start:
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nop
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lui a5, %tprel_hi(i)
23+
add a5, a5, tp, %tprel_add(i)
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lw t0, %tprel_lo(i)(a5)
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sw t0, %tprel_lo(i)(a5)
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ret
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.size _start, .-_start
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29+
.globl tls_ie
30+
.p2align 2
31+
tls_ie:
32+
nop
33+
la.tls.ie a0, i
34+
ret
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.size tls_ie, .-tls_ie
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37+
.section .tbss,"awT",@nobits
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.type i,@object
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.globl i
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.p2align 3
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i:
42+
.quad 0
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.size i, .-i
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‎bolt/test/RISCV/tls-le-gnu-ld.test‎

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// This test checks that the binaries produces with GNU ld TLS le relaxation are
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// properly processed by BOLT. GNU ld currently emits two non-standard
3+
// relocations (R_RISCV_TPREL_I and R_RISCV_TPREL_S) in this case.
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5+
// RUN: yaml2obj %p/Inputs/tls-le-gnu-ld.yaml &> %t.exe
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// RUN: llvm-bolt %t.exe -o %t.bolt.exe --print-cfg --print-only=_start \
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// RUN: | FileCheck %s
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9+
// CHECK: Binary Function "_start" after building cfg {
10+
// CHECK: lw t0, 0(tp)
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// CHECK-NEXT: sw t0, 0(tp)

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