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Add check for register.
1 parent 1b1804e commit 30cb382

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lld/ELF/Arch/LoongArch.cpp

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Original file line numberDiff line numberDiff line change
@@ -134,6 +134,8 @@ static uint32_t extractBits(uint64_t v, uint32_t begin, uint32_t end) {
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static uint32_t getD5(uint64_t v) { return extractBits(v, 4, 0); }
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static uint32_t getJ5(uint64_t v) { return extractBits(v, 9, 5); }
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static uint32_t setD5k16(uint32_t insn, uint32_t imm) {
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uint32_t immLo = extractBits(imm, 15, 0);
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uint32_t immHi = extractBits(imm, 20, 16);
@@ -816,7 +818,11 @@ static void relaxPCHi20Lo12(Ctx &ctx, const InputSection &sec, size_t i,
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// addi.w/d.
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// * The destination register of pcalau12i is guaranteed to be used only by
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// the immediately following instruction.
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const uint32_t currInsn = read32le(sec.content().data() + rHi20.offset);
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const uint32_t nextInsn = read32le(sec.content().data() + rLo12.offset);
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// Check if use the same register.
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if (getD5(currInsn) != getJ5(nextInsn) || getJ5(nextInsn) != getD5(nextInsn))
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return;
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sec.relaxAux->relocTypes[i] = R_LARCH_RELAX;
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sec.relaxAux->relocTypes[i + 2] = R_LARCH_PCREL20_S2;

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