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[flang] update ppc lit tests after using vector.insert and vector.extract (NFC) (#148775)
See #143272
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6 files changed

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‎flang/test/Lower/PowerPC/ppc-vec-extract-elem-order.f90‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
! RUN: %flang_fc1 -flang-experimental-hlfir -emit-llvm %s -fno-ppc-native-vector-element-order -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="LLVMIR" %s
1+
! RUN: %flang_fc1 -emit-llvm %s -fno-ppc-native-vector-element-order -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="LLVMIR" %s
22
! REQUIRES: target=powerpc{{.*}}
33

44
!CHECK-LABEL: vec_extract_testr4i8
@@ -27,6 +27,7 @@ subroutine vec_extract_testi8i1(arg1, arg2, r)
2727
! LLVMIR: %[[arg2:.*]] = load i8, ptr %{{[0-9]}}, align 1
2828
! LLVMIR: %[[urem:.*]] = urem i8 %[[arg2]], 2
2929
! LLVMIR: %[[sub:.*]] = sub i8 1, %[[urem]]
30-
! LLVMIR: %[[r:.*]] = extractelement <2 x i64> %[[arg1]], i8 %[[sub]]
30+
! LLVMIR: %[[idx:.*]] = zext i8 %[[sub]] to i64
31+
! LLVMIR: %[[r:.*]] = extractelement <2 x i64> %[[arg1]], i64 %[[idx]]
3132
! LLVMIR: store i64 %[[r]], ptr %{{[0-9]}}, align 8
3233
end subroutine vec_extract_testi8i1

‎flang/test/Lower/PowerPC/ppc-vec-extract.f90‎

Lines changed: 80 additions & 62 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
1-
! RUN: %flang_fc1 -flang-experimental-hlfir -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefixes="LLVMIR","LLVMIR-LE" %s
2-
! RUN: %flang_fc1 -flang-experimental-hlfir -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefixes="LLVMIR","LLVMIR-BE" %s
1+
! RUN: %flang_fc1 -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefixes="LLVMIR","LLVMIR-LE" %s
2+
! RUN: %flang_fc1 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefixes="LLVMIR","LLVMIR-BE" %s
33
! REQUIRES: target=powerpc{{.*}}
44

55
!-------------
@@ -19,8 +19,9 @@ subroutine vec_extract_testf32(x, i1, i2, i4, i8)
1919
! LLVMIR: %[[i1:.*]] = load i8, ptr %{{[0-9]}}, align 1
2020
! LLVMIR: %[[u:.*]] = urem i8 %[[i1]], 4
2121
! LLVMIR-BE: %[[s:.*]] = sub i8 3, %[[u]]
22-
! LLVMIR-LE: %[[r:.*]] = extractelement <4 x float> %[[x]], i8 %[[u]]
23-
! LLVMIR-BE: %[[r:.*]] = extractelement <4 x float> %[[x]], i8 %[[s]]
22+
! LLVMIR-BE: %[[idx:.*]] = zext i8 %[[s]] to i64
23+
! LLVMIR-LE: %[[idx:.*]] = zext i8 %[[u]] to i64
24+
! LLVMIR: %[[r:.*]] = extractelement <4 x float> %[[x]], i64 %[[idx]]
2425
! LLVMIR: store float %[[r]], ptr %{{[0-9]}}, align 4
2526

2627
r = vec_extract(x, i2)
@@ -29,8 +30,9 @@ subroutine vec_extract_testf32(x, i1, i2, i4, i8)
2930
! LLVMIR: %[[i2:.*]] = load i16, ptr %{{[0-9]}}, align 2
3031
! LLVMIR: %[[u:.*]] = urem i16 %[[i2]], 4
3132
! LLVMIR-BE: %[[s:.*]] = sub i16 3, %[[u]]
32-
! LLVMIR-LE: %[[r:.*]] = extractelement <4 x float> %[[x]], i16 %[[u]]
33-
! LLVMIR-BE: %[[r:.*]] = extractelement <4 x float> %[[x]], i16 %[[s]]
33+
! LLVMIR-BE: %[[idx:.*]] = zext i16 %[[s]] to i64
34+
! LLVMIR-LE: %[[idx:.*]] = zext i16 %[[u]] to i64
35+
! LLVMIR: %[[r:.*]] = extractelement <4 x float> %[[x]], i64 %[[idx]]
3436
! LLVMIR: store float %[[r]], ptr %{{[0-9]}}, align 4
3537

3638
r = vec_extract(x, i4)
@@ -39,18 +41,19 @@ subroutine vec_extract_testf32(x, i1, i2, i4, i8)
3941
! LLVMIR: %[[i4:.*]] = load i32, ptr %{{[0-9]}}, align 4
4042
! LLVMIR: %[[u:.*]] = urem i32 %[[i4]], 4
4143
! LLVMIR-BE: %[[s:.*]] = sub i32 3, %[[u]]
42-
! LLVMIR-LE: %[[r:.*]] = extractelement <4 x float> %[[x]], i32 %[[u]]
43-
! LLVMIR-BE: %[[r:.*]] = extractelement <4 x float> %[[x]], i32 %[[s]]
44+
! LLVMIR-BE: %[[idx:.*]] = zext i32 %[[s]] to i64
45+
! LLVMIR-LE: %[[idx:.*]] = zext i32 %[[u]] to i64
46+
! LLVMIR: %[[r:.*]] = extractelement <4 x float> %[[x]], i64 %[[idx]]
4447
! LLVMIR: store float %[[r]], ptr %{{[0-9]}}, align 4
4548

4649
r = vec_extract(x, i8)
4750

4851
! LLVMIR: %[[x:.*]] = load <4 x float>, ptr %{{[0-9]}}, align 16
4952
! LLVMIR: %[[i8:.*]] = load i64, ptr %{{[0-9]}}, align 8
50-
! LLVMIR: %[[u:.*]] = urem i64 %[[i8]], 4
51-
! LLVMIR-BE: %[[s:.*]] = sub i64 3, %[[u]]
52-
! LLVMIR-LE: %[[r:.*]] = extractelement <4 x float> %[[x]], i64 %[[u]]
53-
! LLVMIR-BE: %[[r:.*]] = extractelement <4 x float> %[[x]], i64 %[[s]]
53+
! LLVMIR-BE: %[[u:.*]] = urem i64 %[[i8]], 4
54+
! LLVMIR-BE: %[[idx:.*]] = sub i64 3, %[[u]]
55+
! LLVMIR-LE: %[[idx:.*]] = urem i64 %[[i8]], 4
56+
! LLVMIR: %[[r:.*]] = extractelement <4 x float> %[[x]], i64 %[[idx]]
5457
! LLVMIR: store float %[[r]], ptr %{{[0-9]}}, align 4
5558
end subroutine vec_extract_testf32
5659

@@ -68,8 +71,9 @@ subroutine vec_extract_testf64(x, i1, i2, i4, i8)
6871
! LLVMIR: %[[i1:.*]] = load i8, ptr %{{[0-9]}}, align 1
6972
! LLVMIR: %[[u:.*]] = urem i8 %[[i1]], 2
7073
! LLVMIR-BE: %[[s:.*]] = sub i8 1, %[[u]]
71-
! LLVMIR-LE: %[[r:.*]] = extractelement <2 x double> %[[x]], i8 %[[u]]
72-
! LLVMIR-BE: %[[r:.*]] = extractelement <2 x double> %[[x]], i8 %[[s]]
74+
! LLVMIR-BE: %[[idx:.*]] = zext i8 %[[s]] to i64
75+
! LLVMIR-LE: %[[idx:.*]] = zext i8 %[[u]] to i64
76+
! LLVMIR: %[[r:.*]] = extractelement <2 x double> %[[x]], i64 %[[idx]]
7377
! LLVMIR: store double %[[r]], ptr %{{[0-9]}}, align 8
7478

7579
r = vec_extract(x, i2)
@@ -78,8 +82,9 @@ subroutine vec_extract_testf64(x, i1, i2, i4, i8)
7882
! LLVMIR: %[[i2:.*]] = load i16, ptr %{{[0-9]}}, align 2
7983
! LLVMIR: %[[u:.*]] = urem i16 %[[i2]], 2
8084
! LLVMIR-BE: %[[s:.*]] = sub i16 1, %[[u]]
81-
! LLVMIR-LE: %[[r:.*]] = extractelement <2 x double> %[[x]], i16 %[[u]]
82-
! LLVMIR-BE: %[[r:.*]] = extractelement <2 x double> %[[x]], i16 %[[s]]
85+
! LLVMIR-BE: %[[idx:.*]] = zext i16 %[[s]] to i64
86+
! LLVMIR-LE: %[[idx:.*]] = zext i16 %[[u]] to i64
87+
! LLVMIR: %[[r:.*]] = extractelement <2 x double> %[[x]], i64 %[[idx]]
8388
! LLVMIR: store double %[[r]], ptr %{{[0-9]}}, align 8
8489

8590

@@ -89,18 +94,19 @@ subroutine vec_extract_testf64(x, i1, i2, i4, i8)
8994
! LLVMIR: %[[i4:.*]] = load i32, ptr %{{[0-9]}}, align 4
9095
! LLVMIR: %[[u:.*]] = urem i32 %[[i4]], 2
9196
! LLVMIR-BE: %[[s:.*]] = sub i32 1, %[[u]]
92-
! LLVMIR-LE: %[[r:.*]] = extractelement <2 x double> %[[x]], i32 %[[u]]
93-
! LLVMIR-BE: %[[r:.*]] = extractelement <2 x double> %[[x]], i32 %[[s]]
97+
! LLVMIR-BE: %[[idx:.*]] = zext i32 %[[s]] to i64
98+
! LLVMIR-LE: %[[idx:.*]] = zext i32 %[[u]] to i64
99+
! LLVMIR: %[[r:.*]] = extractelement <2 x double> %[[x]], i64 %[[idx]]
94100
! LLVMIR: store double %[[r]], ptr %{{[0-9]}}, align 8
95101

96102
r = vec_extract(x, i8)
97103

98104
! LLVMIR: %[[x:.*]] = load <2 x double>, ptr %{{[0-9]}}, align 16
99105
! LLVMIR: %[[i8:.*]] = load i64, ptr %{{[0-9]}}, align 8
100-
! LLVMIR: %[[u:.*]] = urem i64 %[[i8]], 2
101-
! LLVMIR-BE: %[[s:.*]] = sub i64 1, %[[u]]
102-
! LLVMIR-LE: %[[r:.*]] = extractelement <2 x double> %[[x]], i64 %[[u]]
103-
! LLVMIR-BE: %[[r:.*]] = extractelement <2 x double> %[[x]], i64 %[[s]]
106+
! LLVMIR-BE: %[[u:.*]] = urem i64 %[[i8]], 2
107+
! LLVMIR-BE: %[[idx:.*]] = sub i64 1, %[[u]]
108+
! LLVMIR-LE: %[[idx:.*]] = urem i64 %[[i8]], 2
109+
! LLVMIR: %[[r:.*]] = extractelement <2 x double> %[[x]], i64 %[[idx]]
104110
! LLVMIR: store double %[[r]], ptr %{{[0-9]}}, align 8
105111
end subroutine vec_extract_testf64
106112

@@ -118,8 +124,9 @@ subroutine vec_extract_testi8(x, i1, i2, i4, i8)
118124
! LLVMIR: %[[i1:.*]] = load i8, ptr %{{[0-9]}}, align 1
119125
! LLVMIR: %[[u:.*]] = urem i8 %[[i1]], 16
120126
! LLVMIR-BE: %[[s:.*]] = sub i8 15, %[[u]]
121-
! LLVMIR-LE: %[[r:.*]] = extractelement <16 x i8> %[[x]], i8 %[[u]]
122-
! LLVMIR-BE: %[[r:.*]] = extractelement <16 x i8> %[[x]], i8 %[[s]]
127+
! LLVMIR-BE: %[[idx:.*]] = zext i8 %[[s]] to i64
128+
! LLVMIR-LE: %[[idx:.*]] = zext i8 %[[u]] to i64
129+
! LLVMIR: %[[r:.*]] = extractelement <16 x i8> %[[x]], i64 %[[idx]]
123130
! LLVMIR: store i8 %[[r]], ptr %{{[0-9]}}, align 1
124131

125132
r = vec_extract(x, i2)
@@ -128,8 +135,9 @@ subroutine vec_extract_testi8(x, i1, i2, i4, i8)
128135
! LLVMIR: %[[i2:.*]] = load i16, ptr %{{[0-9]}}, align 2
129136
! LLVMIR: %[[u:.*]] = urem i16 %[[i2]], 16
130137
! LLVMIR-BE: %[[s:.*]] = sub i16 15, %[[u]]
131-
! LLVMIR-LE: %[[r:.*]] = extractelement <16 x i8> %[[x]], i16 %[[u]]
132-
! LLVMIR-BE: %[[r:.*]] = extractelement <16 x i8> %[[x]], i16 %[[s]]
138+
! LLVMIR-BE: %[[idx:.*]] = zext i16 %[[s]] to i64
139+
! LLVMIR-LE: %[[idx:.*]] = zext i16 %[[u]] to i64
140+
! LLVMIR: %[[r:.*]] = extractelement <16 x i8> %[[x]], i64 %[[idx]]
133141
! LLVMIR: store i8 %[[r]], ptr %{{[0-9]}}, align 1
134142

135143
r = vec_extract(x, i4)
@@ -138,18 +146,19 @@ subroutine vec_extract_testi8(x, i1, i2, i4, i8)
138146
! LLVMIR: %[[i4:.*]] = load i32, ptr %{{[0-9]}}, align 4
139147
! LLVMIR: %[[u:.*]] = urem i32 %[[i4]], 16
140148
! LLVMIR-BE: %[[s:.*]] = sub i32 15, %[[u]]
141-
! LLVMIR-LE: %[[r:.*]] = extractelement <16 x i8> %[[x]], i32 %[[u]]
142-
! LLVMIR-BE: %[[r:.*]] = extractelement <16 x i8> %[[x]], i32 %[[s]]
149+
! LLVMIR-BE: %[[idx:.*]] = zext i32 %[[s]] to i64
150+
! LLVMIR-LE: %[[idx:.*]] = zext i32 %[[u]] to i64
151+
! LLVMIR: %[[r:.*]] = extractelement <16 x i8> %[[x]], i64 %[[idx]]
143152
! LLVMIR: store i8 %[[r]], ptr %{{[0-9]}}, align 1
144153

145154
r = vec_extract(x, i8)
146155

147156
! LLVMIR: %[[x:.*]] = load <16 x i8>, ptr %{{[0-9]}}, align 16
148157
! LLVMIR: %[[i8:.*]] = load i64, ptr %{{[0-9]}}, align 8
149-
! LLVMIR: %[[u:.*]] = urem i64 %[[i8]], 16
150-
! LLVMIR-BE: %[[s:.*]] = sub i64 15, %[[u]]
151-
! LLVMIR-LE: %[[r:.*]] = extractelement <16 x i8> %[[x]], i64 %[[u]]
152-
! LLVMIR-BE: %[[r:.*]] = extractelement <16 x i8> %[[x]], i64 %[[s]]
158+
! LLVMIR-BE: %[[u:.*]] = urem i64 %[[i8]], 16
159+
! LLVMIR-BE: %[[idx:.*]] = sub i64 15, %[[u]]
160+
! LLVMIR-LE: %[[idx:.*]] = urem i64 %[[i8]], 16
161+
! LLVMIR: %[[r:.*]] = extractelement <16 x i8> %[[x]], i64 %[[idx]]
153162
! LLVMIR: store i8 %[[r]], ptr %{{[0-9]}}, align 1
154163
end subroutine vec_extract_testi8
155164

@@ -167,8 +176,9 @@ subroutine vec_extract_testi16(x, i1, i2, i4, i8)
167176
! LLVMIR: %[[i1:.*]] = load i8, ptr %{{[0-9]}}, align 1
168177
! LLVMIR: %[[u:.*]] = urem i8 %[[i1]], 8
169178
! LLVMIR-BE: %[[s:.*]] = sub i8 7, %[[u]]
170-
! LLVMIR-LE: %[[r:.*]] = extractelement <8 x i16> %[[x]], i8 %[[u]]
171-
! LLVMIR-BE: %[[r:.*]] = extractelement <8 x i16> %[[x]], i8 %[[s]]
179+
! LLVMIR-BE: %[[idx:.*]] = zext i8 %[[s]] to i64
180+
! LLVMIR-LE: %[[idx:.*]] = zext i8 %[[u]] to i64
181+
! LLVMIR: %[[r:.*]] = extractelement <8 x i16> %[[x]], i64 %[[idx]]
172182
! LLVMIR: store i16 %[[r]], ptr %{{[0-9]}}, align 2
173183

174184
r = vec_extract(x, i2)
@@ -177,8 +187,9 @@ subroutine vec_extract_testi16(x, i1, i2, i4, i8)
177187
! LLVMIR: %[[i2:.*]] = load i16, ptr %{{[0-9]}}, align 2
178188
! LLVMIR: %[[u:.*]] = urem i16 %[[i2]], 8
179189
! LLVMIR-BE: %[[s:.*]] = sub i16 7, %[[u]]
180-
! LLVMIR-LE: %[[r:.*]] = extractelement <8 x i16> %[[x]], i16 %[[u]]
181-
! LLVMIR-BE: %[[r:.*]] = extractelement <8 x i16> %[[x]], i16 %[[s]]
190+
! LLVMIR-BE: %[[idx:.*]] = zext i16 %[[s]] to i64
191+
! LLVMIR-LE: %[[idx:.*]] = zext i16 %[[u]] to i64
192+
! LLVMIR: %[[r:.*]] = extractelement <8 x i16> %[[x]], i64 %[[idx]]
182193
! LLVMIR: store i16 %[[r]], ptr %{{[0-9]}}, align 2
183194

184195
r = vec_extract(x, i4)
@@ -187,18 +198,19 @@ subroutine vec_extract_testi16(x, i1, i2, i4, i8)
187198
! LLVMIR: %[[i4:.*]] = load i32, ptr %{{[0-9]}}, align 4
188199
! LLVMIR: %[[u:.*]] = urem i32 %[[i4]], 8
189200
! LLVMIR-BE: %[[s:.*]] = sub i32 7, %[[u]]
190-
! LLVMIR-LE: %[[r:.*]] = extractelement <8 x i16> %[[x]], i32 %[[u]]
191-
! LLVMIR-BE: %[[r:.*]] = extractelement <8 x i16> %[[x]], i32 %[[s]]
201+
! LLVMIR-BE: %[[idx:.*]] = zext i32 %[[s]] to i64
202+
! LLVMIR-LE: %[[idx:.*]] = zext i32 %[[u]] to i64
203+
! LLVMIR: %[[r:.*]] = extractelement <8 x i16> %[[x]], i64 %[[idx]]
192204
! LLVMIR: store i16 %[[r]], ptr %{{[0-9]}}, align 2
193205

194206
r = vec_extract(x, i8)
195207

196208
! LLVMIR: %[[x:.*]] = load <8 x i16>, ptr %{{[0-9]}}, align 16
197209
! LLVMIR: %[[i8:.*]] = load i64, ptr %{{[0-9]}}, align 8
198-
! LLVMIR: %[[u:.*]] = urem i64 %[[i8]], 8
199-
! LLVMIR-BE: %[[s:.*]] = sub i64 7, %[[u]]
200-
! LLVMIR-LE: %[[r:.*]] = extractelement <8 x i16> %[[x]], i64 %[[u]]
201-
! LLVMIR-BE: %[[r:.*]] = extractelement <8 x i16> %[[x]], i64 %[[s]]
210+
! LLVMIR-BE: %[[u:.*]] = urem i64 %[[i8]], 8
211+
! LLVMIR-BE: %[[idx:.*]] = sub i64 7, %[[u]]
212+
! LLVMIR-LE: %[[idx:.*]] = urem i64 %[[i8]], 8
213+
! LLVMIR: %[[r:.*]] = extractelement <8 x i16> %[[x]], i64 %[[idx]]
202214
! LLVMIR: store i16 %[[r]], ptr %{{[0-9]}}, align 2
203215
end subroutine vec_extract_testi16
204216

@@ -216,8 +228,9 @@ subroutine vec_extract_testi32(x, i1, i2, i4, i8)
216228
! LLVMIR: %[[i1:.*]] = load i8, ptr %{{[0-9]}}, align 1
217229
! LLVMIR: %[[u:.*]] = urem i8 %[[i1]], 4
218230
! LLVMIR-BE: %[[s:.*]] = sub i8 3, %[[u]]
219-
! LLVMIR-LE: %[[r:.*]] = extractelement <4 x i32> %[[x]], i8 %[[u]]
220-
! LLVMIR-BE: %[[r:.*]] = extractelement <4 x i32> %[[x]], i8 %[[s]]
231+
! LLVMIR-BE: %[[idx:.*]] = zext i8 %[[s]] to i64
232+
! LLVMIR-LE: %[[idx:.*]] = zext i8 %[[u]] to i64
233+
! LLVMIR: %[[r:.*]] = extractelement <4 x i32> %[[x]], i64 %[[idx]]
221234
! LLVMIR: store i32 %[[r]], ptr %{{[0-9]}}, align 4
222235

223236
r = vec_extract(x, i2)
@@ -226,8 +239,9 @@ subroutine vec_extract_testi32(x, i1, i2, i4, i8)
226239
! LLVMIR: %[[i2:.*]] = load i16, ptr %{{[0-9]}}, align 2
227240
! LLVMIR: %[[u:.*]] = urem i16 %[[i2]], 4
228241
! LLVMIR-BE: %[[s:.*]] = sub i16 3, %[[u]]
229-
! LLVMIR-LE: %[[r:.*]] = extractelement <4 x i32> %[[x]], i16 %[[u]]
230-
! LLVMIR-BE: %[[r:.*]] = extractelement <4 x i32> %[[x]], i16 %[[s]]
242+
! LLVMIR-BE: %[[idx:.*]] = zext i16 %[[s]] to i64
243+
! LLVMIR-LE: %[[idx:.*]] = zext i16 %[[u]] to i64
244+
! LLVMIR: %[[r:.*]] = extractelement <4 x i32> %[[x]], i64 %[[idx]]
231245
! LLVMIR: store i32 %[[r]], ptr %{{[0-9]}}, align 4
232246

233247
r = vec_extract(x, i4)
@@ -236,18 +250,19 @@ subroutine vec_extract_testi32(x, i1, i2, i4, i8)
236250
! LLVMIR: %[[i4:.*]] = load i32, ptr %{{[0-9]}}, align 4
237251
! LLVMIR: %[[u:.*]] = urem i32 %[[i4]], 4
238252
! LLVMIR-BE: %[[s:.*]] = sub i32 3, %[[u]]
239-
! LLVMIR-LE: %[[r:.*]] = extractelement <4 x i32> %[[x]], i32 %[[u]]
240-
! LLVMIR-BE: %[[r:.*]] = extractelement <4 x i32> %[[x]], i32 %[[s]]
253+
! LLVMIR-BE: %[[idx:.*]] = zext i32 %[[s]] to i64
254+
! LLVMIR-LE: %[[idx:.*]] = zext i32 %[[u]] to i64
255+
! LLVMIR: %[[r:.*]] = extractelement <4 x i32> %[[x]], i64 %[[idx]]
241256
! LLVMIR: store i32 %[[r]], ptr %{{[0-9]}}, align 4
242257

243258
r = vec_extract(x, i8)
244259

245260
! LLVMIR: %[[x:.*]] = load <4 x i32>, ptr %{{[0-9]}}, align 16
246261
! LLVMIR: %[[i8:.*]] = load i64, ptr %{{[0-9]}}, align 8
247-
! LLVMIR: %[[u:.*]] = urem i64 %[[i8]], 4
248-
! LLVMIR-BE: %[[s:.*]] = sub i64 3, %[[u]]
249-
! LLVMIR-LE: %[[r:.*]] = extractelement <4 x i32> %[[x]], i64 %[[u]]
250-
! LLVMIR-BE: %[[r:.*]] = extractelement <4 x i32> %[[x]], i64 %[[s]]
262+
! LLVMIR-BE: %[[u:.*]] = urem i64 %[[i8]], 4
263+
! LLVMIR-BE: %[[idx:.*]] = sub i64 3, %[[u]]
264+
! LLVMIR-LE: %[[idx:.*]] = urem i64 %[[i8]], 4
265+
! LLVMIR: %[[r:.*]] = extractelement <4 x i32> %[[x]], i64 %[[idx]]
251266
! LLVMIR: store i32 %[[r]], ptr %{{[0-9]}}, align 4
252267
end subroutine vec_extract_testi32
253268

@@ -265,8 +280,9 @@ subroutine vec_extract_testi64(x, i1, i2, i4, i8)
265280
! LLVMIR: %[[i1:.*]] = load i8, ptr %{{[0-9]}}, align 1
266281
! LLVMIR: %[[u:.*]] = urem i8 %[[i1]], 2
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! LLVMIR-BE: %[[s:.*]] = sub i8 1, %[[u]]
268-
! LLVMIR-LE: %[[r:.*]] = extractelement <2 x i64> %[[x]], i8 %[[u]]
269-
! LLVMIR-BE: %[[r:.*]] = extractelement <2 x i64> %[[x]], i8 %[[s]]
283+
! LLVMIR-BE: %[[idx:.*]] = zext i8 %[[s]] to i64
284+
! LLVMIR-LE: %[[idx:.*]] = zext i8 %[[u]] to i64
285+
! LLVMIR: %[[r:.*]] = extractelement <2 x i64> %[[x]], i64 %[[idx]]
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! LLVMIR: store i64 %[[r]], ptr %{{[0-9]}}, align 8
271287

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r = vec_extract(x, i2)
@@ -275,8 +291,9 @@ subroutine vec_extract_testi64(x, i1, i2, i4, i8)
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! LLVMIR: %[[i2:.*]] = load i16, ptr %{{[0-9]}}, align 2
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! LLVMIR: %[[u:.*]] = urem i16 %[[i2]], 2
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! LLVMIR-BE: %[[s:.*]] = sub i16 1, %[[u]]
278-
! LLVMIR-LE: %[[r:.*]] = extractelement <2 x i64> %[[x]], i16 %[[u]]
279-
! LLVMIR-BE: %[[r:.*]] = extractelement <2 x i64> %[[x]], i16 %[[s]]
294+
! LLVMIR-BE: %[[idx:.*]] = zext i16 %[[s]] to i64
295+
! LLVMIR-LE: %[[idx:.*]] = zext i16 %[[u]] to i64
296+
! LLVMIR: %[[r:.*]] = extractelement <2 x i64> %[[x]], i64 %[[idx]]
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! LLVMIR: store i64 %[[r]], ptr %{{[0-9]}}, align 8
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r = vec_extract(x, i4)
@@ -285,17 +302,18 @@ subroutine vec_extract_testi64(x, i1, i2, i4, i8)
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! LLVMIR: %[[i4:.*]] = load i32, ptr %{{[0-9]}}, align 4
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! LLVMIR: %[[u:.*]] = urem i32 %[[i4]], 2
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! LLVMIR-BE: %[[s:.*]] = sub i32 1, %[[u]]
288-
! LLVMIR-LE: %[[r:.*]] = extractelement <2 x i64> %[[x]], i32 %[[u]]
289-
! LLVMIR-BE: %[[r:.*]] = extractelement <2 x i64> %[[x]], i32 %[[s]]
305+
! LLVMIR-BE: %[[idx:.*]] = zext i32 %[[s]] to i64
306+
! LLVMIR-LE: %[[idx:.*]] = zext i32 %[[u]] to i64
307+
! LLVMIR: %[[r:.*]] = extractelement <2 x i64> %[[x]], i64 %[[idx]]
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! LLVMIR: store i64 %[[r]], ptr %{{[0-9]}}, align 8
291309

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r = vec_extract(x, i8)
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! LLVMIR: %[[x:.*]] = load <2 x i64>, ptr %{{[0-9]}}, align 16
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! LLVMIR: %[[i8:.*]] = load i64, ptr %{{[0-9]}}, align 8
296-
! LLVMIR: %[[u:.*]] = urem i64 %[[i8]], 2
297-
! LLVMIR-BE: %[[s:.*]] = sub i64 1, %[[u]]
298-
! LLVMIR-LE: %[[r:.*]] = extractelement <2 x i64> %[[x]], i64 %[[u]]
299-
! LLVMIR-BE: %[[r:.*]] = extractelement <2 x i64> %[[x]], i64 %[[s]]
314+
! LLVMIR-BE: %[[u:.*]] = urem i64 %[[i8]], 2
315+
! LLVMIR-BE: %[[idx:.*]] = sub i64 1, %[[u]]
316+
! LLVMIR-LE: %[[idx:.*]] = urem i64 %[[i8]], 2
317+
! LLVMIR: %[[r:.*]] = extractelement <2 x i64> %[[x]], i64 %[[idx]]
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! LLVMIR: store i64 %[[r]], ptr %{{[0-9]}}, align 8
301319
end subroutine vec_extract_testi64

‎flang/test/Lower/PowerPC/ppc-vec-insert-elem-order.f90‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
! RUN: %flang_fc1 -flang-experimental-hlfir -emit-llvm %s -fno-ppc-native-vector-element-order -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="LLVMIR" %s
1+
! RUN: %flang_fc1 -emit-llvm %s -fno-ppc-native-vector-element-order -triple ppc64le-unknown-linux -o - | FileCheck --check-prefixes="LLVMIR" %s
22
! REQUIRES: target=powerpc{{.*}}
33

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!CHECK-LABEL: vec_insert_testf32i64
@@ -31,6 +31,7 @@ subroutine vec_insert_testi64i8(v, x, i1, i2, i4, i8)
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! LLVMIR: %[[i1:.*]] = load i8, ptr %{{[0-9]}}, align 1
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! LLVMIR: %[[urem:.*]] = urem i8 %[[i1]], 2
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! LLVMIR: %[[sub:.*]] = sub i8 1, %[[urem]]
34-
! LLVMIR: %[[r:.*]] = insertelement <2 x i64> %[[x]], i64 %[[v]], i8 %[[sub]]
34+
! LLVMIR: %[[idx:.*]] = zext i8 %[[sub]] to i64
35+
! LLVMIR: %[[r:.*]] = insertelement <2 x i64> %[[x]], i64 %[[v]], i64 %[[idx]]
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! LLVMIR: store <2 x i64> %[[r]], ptr %{{[0-9]}}, align 16
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end subroutine vec_insert_testi64i8

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