Add back in SDiv/UDiv/URem/SRem, but don't freeze them

Author: bababuck

llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp

@@ -907,12 +907,20 @@ static Instruction *foldSelectZeroOrFixedOp(SelectInst &SI,
   if (TrueValC == nullptr || !isa<Instruction>(FalseVal))
     return nullptr;
 
-  if (!(match(FalseVal, m_c_Mul(m_Specific(X), m_Value(Y))) ||
-        match(FalseVal, m_c_And(m_Specific(X), m_Value(Y))) ||
-        match(FalseVal, m_FShl(m_Specific(X), m_Specific(X), m_Value(Y))) ||
-        match(FalseVal, m_FShr(m_Specific(X), m_Specific(X), m_Value(Y))) ||
-        match(FalseVal,
-              m_c_Intrinsic<Intrinsic::umin>(m_Specific(X), m_Value(Y))))) {
+  bool FreezeY;
+  if (match(FalseVal, m_c_Mul(m_Specific(X), m_Value(Y))) ||
+      match(FalseVal, m_c_And(m_Specific(X), m_Value(Y))) ||
+      match(FalseVal, m_FShl(m_Specific(X), m_Specific(X), m_Value(Y))) ||
+      match(FalseVal, m_FShr(m_Specific(X), m_Specific(X), m_Value(Y))) ||
+      match(FalseVal,
+            m_c_Intrinsic<Intrinsic::umin>(m_Specific(X), m_Value(Y)))) {
+    FreezeY = true;
+  } else if (match(FalseVal, m_SDiv(m_Specific(X), m_Value(Y))) ||
+             match(FalseVal, m_UDiv(m_Specific(X), m_Value(Y))) ||
+             match(FalseVal, m_SRem(m_Specific(X), m_Value(Y))) ||
+             match(FalseVal, m_URem(m_Specific(X), m_Value(Y)))) {
+    FreezeY = false;
+  } else {
     return nullptr;
   }
 
@@ -925,13 +933,15 @@ static Instruction *foldSelectZeroOrFixedOp(SelectInst &SI,
     return nullptr;
 
   auto *FalseValI = cast<Instruction>(FalseVal);
-  auto *FrY = IC.InsertNewInstBefore(new FreezeInst(Y, Y->getName() + ".fr"),
-                                     FalseValI->getIterator());
-  IC.replaceOperand(*FalseValI,
-                    FalseValI->getOperand(0) == Y
-                        ? 0
-                        : (FalseValI->getOperand(1) == Y ? 1 : 2),
-                    FrY);
+  if (FreezeY) {
+    auto *FrY = IC.InsertNewInstBefore(new FreezeInst(Y, Y->getName() + ".fr"),
+                                       FalseValI->getIterator());
+    IC.replaceOperand(*FalseValI,
+                      FalseValI->getOperand(0) == Y
+                          ? 0
+                          : (FalseValI->getOperand(1) == Y ? 1 : 2),
+                      FrY);
+  }
   return IC.replaceInstUsesWith(SI, FalseValI);
 }
 

llvm/test/Transforms/InstCombine/select-fixed-zero.ll

@@ -125,10 +125,8 @@ define i64 @fshr_select_no_combine(i64 %a, i64 %b, i64 %c) {
 ; (select (icmp x, 0, eq), 0, (sdiv x, y)) -> (sdiv x, y)
 define i64 @sdiv_select(i64 %a, i64 %b) {
 ; CHECK-LABEL: @sdiv_select(
-; CHECK-NEXT:    [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
-; CHECK-NEXT:    [[DIV:%.*]] = sdiv i64 [[A]], [[B_FR:%.*]]
-; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[DIV]]
-; CHECK-NEXT:    ret i64 [[SELECT]]
+; CHECK-NEXT:    [[DIV:%.*]] = sdiv i64 [[A:%.*]], [[B_FR:%.*]]
+; CHECK-NEXT:    ret i64 [[DIV]]
 ;
   %cond = icmp eq i64 %a, 0
   %div = sdiv i64 %a, %b
@@ -139,10 +137,8 @@ define i64 @sdiv_select(i64 %a, i64 %b) {
 ; (select (icmp x, 0, eq), 0, (udiv x, y)) -> (udiv x, y)
 define i64 @udiv_select(i64 %a, i64 %b) {
 ; CHECK-LABEL: @udiv_select(
-; CHECK-NEXT:    [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
-; CHECK-NEXT:    [[DIV:%.*]] = udiv i64 [[A]], [[B_FR:%.*]]
-; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[DIV]]
-; CHECK-NEXT:    ret i64 [[SELECT]]
+; CHECK-NEXT:    [[DIV:%.*]] = udiv i64 [[A:%.*]], [[B_FR:%.*]]
+; CHECK-NEXT:    ret i64 [[DIV]]
 ;
   %cond = icmp eq i64 %a, 0
   %div = udiv i64 %a, %b
@@ -153,10 +149,8 @@ define i64 @udiv_select(i64 %a, i64 %b) {
 ; (select (icmp x, 0, eq), 0, (srem x, y)) -> (srem x, y)
 define i64 @srem_select(i64 %a, i64 %b) {
 ; CHECK-LABEL: @srem_select(
-; CHECK-NEXT:    [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
-; CHECK-NEXT:    [[REM:%.*]] = srem i64 [[A]], [[B:%.*]]
-; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[REM]]
-; CHECK-NEXT:    ret i64 [[SELECT]]
+; CHECK-NEXT:    [[REM:%.*]] = srem i64 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i64 [[REM]]
 ;
   %cond = icmp eq i64 %a, 0
   %rem = srem i64 %a, %b
@@ -167,10 +161,8 @@ define i64 @srem_select(i64 %a, i64 %b) {
 ; (select (icmp x, 0, eq), 0, (urem x, y)) -> (urem x, y)
 define i64 @urem_select(i64 %a, i64 %b) {
 ; CHECK-LABEL: @urem_select(
-; CHECK-NEXT:    [[COND:%.*]] = icmp eq i64 [[A:%.*]], 0
-; CHECK-NEXT:    [[REM:%.*]] = urem i64 [[A]], [[B:%.*]]
-; CHECK-NEXT:    [[SELECT:%.*]] = select i1 [[COND]], i64 0, i64 [[REM]]
-; CHECK-NEXT:    ret i64 [[SELECT]]
+; CHECK-NEXT:    [[REM:%.*]] = urem i64 [[A:%.*]], [[B:%.*]]
+; CHECK-NEXT:    ret i64 [[REM]]
 ;
   %cond = icmp eq i64 %a, 0
   %rem = urem i64 %a, %b