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nikicnikic
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apint only
1 parent 5bcc82d commit 17ba7e8

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39 files changed

+125
-74
lines changed

39 files changed

+125
-74
lines changed

‎clang/lib/AST/ByteCode/IntegralAP.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,7 @@ template <bool Signed> class IntegralAP final {
6161

6262
IntegralAP(APInt V) : V(V) {}
6363
/// Arbitrary value for uninitialized variables.
64-
IntegralAP() : IntegralAP(-1, 3) {}
64+
IntegralAP() : IntegralAP(Signed ? -1 : 7, 3) {}
6565

6666
IntegralAP operator-() const { return IntegralAP(-V); }
6767
IntegralAP operator-(const IntegralAP &Other) const {
@@ -112,7 +112,9 @@ template <bool Signed> class IntegralAP final {
112112

113113
template <unsigned Bits, bool InputSigned>
114114
static IntegralAP from(Integral<Bits, InputSigned> I, unsigned BitWidth) {
115-
APInt Copy = APInt(BitWidth, static_cast<uint64_t>(I), InputSigned);
115+
// TODO: Avoid implicit trunc?
116+
APInt Copy = APInt(BitWidth, static_cast<uint64_t>(I), InputSigned,
117+
/*implicitTrunc=*/true);
116118

117119
return IntegralAP<Signed>(Copy);
118120
}

‎clang/lib/CodeGen/CGVTT.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -85,8 +85,9 @@ CodeGenVTables::EmitVTTDefinition(llvm::GlobalVariable *VTT,
8585
cast<llvm::StructType>(VTable->getValueType())
8686
->getElementType(AddressPoint.VTableIndex));
8787
unsigned Offset = ComponentSize * AddressPoint.AddressPointIndex;
88-
llvm::ConstantRange InRange(llvm::APInt(32, -Offset, true),
89-
llvm::APInt(32, VTableSize - Offset, true));
88+
llvm::ConstantRange InRange(
89+
llvm::APInt(32, (int)-Offset, true),
90+
llvm::APInt(32, (int)(VTableSize - Offset), true));
9091
llvm::Constant *Init = llvm::ConstantExpr::getGetElementPtr(
9192
VTable->getValueType(), VTable, Idxs, /*InBounds=*/true, InRange);
9293

‎clang/lib/CodeGen/ItaniumCXXABI.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2099,8 +2099,9 @@ ItaniumCXXABI::getVTableAddressPoint(BaseSubobject Base,
20992099
unsigned VTableSize =
21002100
ComponentSize * Layout.getVTableSize(AddressPoint.VTableIndex);
21012101
unsigned Offset = ComponentSize * AddressPoint.AddressPointIndex;
2102-
llvm::ConstantRange InRange(llvm::APInt(32, -Offset, true),
2103-
llvm::APInt(32, VTableSize - Offset, true));
2102+
llvm::ConstantRange InRange(
2103+
llvm::APInt(32, (int)-Offset, true),
2104+
llvm::APInt(32, (int)(VTableSize - Offset), true));
21042105
return llvm::ConstantExpr::getGetElementPtr(
21052106
VTable->getValueType(), VTable, Indices, /*InBounds=*/true, InRange);
21062107
}

‎clang/lib/Parse/ParseInit.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -437,7 +437,9 @@ ExprResult Parser::createEmbedExpr() {
437437
SourceLocation StartLoc = ConsumeAnnotationToken();
438438
if (Data->BinaryData.size() == 1) {
439439
Res = IntegerLiteral::Create(Context,
440-
llvm::APInt(CHAR_BIT, Data->BinaryData.back()),
440+
llvm::APInt(CHAR_BIT, Data->BinaryData.back(),
441+
/*isSigned=*/false,
442+
/*implicitTrunc=*/true),
441443
Context.UnsignedCharTy, StartLoc);
442444
} else {
443445
auto CreateStringLiteralFromStringRef = [&](StringRef Str, QualType Ty) {

‎clang/lib/Sema/SemaExpr.cpp

Lines changed: 5 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3590,8 +3590,11 @@ ExprResult Sema::ActOnCharacterConstant(const Token &Tok, Scope *UDLScope) {
35903590

35913591
ExprResult Sema::ActOnIntegerConstant(SourceLocation Loc, uint64_t Val) {
35923592
unsigned IntSize = Context.getTargetInfo().getIntWidth();
3593-
return IntegerLiteral::Create(Context, llvm::APInt(IntSize, Val),
3594-
Context.IntTy, Loc);
3593+
// TODO: Avoid implicit trunc?
3594+
return IntegerLiteral::Create(
3595+
Context,
3596+
llvm::APInt(IntSize, Val, /*isSigned=*/false, /*implicitTrunc=*/true),
3597+
Context.IntTy, Loc);
35953598
}
35963599

35973600
static Expr *BuildFloatingLiteral(Sema &S, NumericLiteralParser &Literal,

‎clang/lib/Sema/SemaOpenMP.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5699,7 +5699,9 @@ StmtResult SemaOpenMP::ActOnOpenMPCanonicalLoop(Stmt *AStmt) {
56995699
llvm_unreachable("unhandled unary increment operator");
57005700
}
57015701
Step = IntegerLiteral::Create(
5702-
Ctx, llvm::APInt(Ctx.getIntWidth(LogicalTy), Direction), LogicalTy, {});
5702+
Ctx,
5703+
llvm::APInt(Ctx.getIntWidth(LogicalTy), Direction, /*isSigned=*/true),
5704+
LogicalTy, {});
57035705
} else if (auto *IncBin = dyn_cast<BinaryOperator>(Inc)) {
57045706
if (IncBin->getOpcode() == BO_AddAssign) {
57055707
Step = IncBin->getRHS();

‎lldb/source/Expression/DWARFExpression.cpp

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -860,10 +860,11 @@ llvm::Expected<Value> DWARFExpression::Evaluate(
860860
// TODO: Implement a real typed stack, and store the genericness of the value
861861
// there.
862862
auto to_generic = [&](auto v) {
863+
// TODO: Avoid implicit trunc?
863864
bool is_signed = std::is_signed<decltype(v)>::value;
864-
return Scalar(llvm::APSInt(
865-
llvm::APInt(8 * opcodes.GetAddressByteSize(), v, is_signed),
866-
!is_signed));
865+
return Scalar(llvm::APSInt(llvm::APInt(8 * opcodes.GetAddressByteSize(), v,
866+
is_signed, /*implicitTrunc=*/true),
867+
!is_signed));
867868
};
868869

869870
// The default kind is a memory location. This is updated by any

‎llvm/include/llvm/ADT/APFixedPoint.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -159,7 +159,9 @@ class APFixedPoint {
159159
}
160160

161161
APFixedPoint(uint64_t Val, const FixedPointSemantics &Sema)
162-
: APFixedPoint(APInt(Sema.getWidth(), Val, Sema.isSigned()), Sema) {}
162+
: APFixedPoint(APInt(Sema.getWidth(), Val, Sema.isSigned(),
163+
/*implicitTrunc=*/true),
164+
Sema) {}
163165

164166
// Zero initialization.
165167
APFixedPoint(const FixedPointSemantics &Sema) : APFixedPoint(0, Sema) {}

‎llvm/lib/Analysis/ConstantFolding.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -887,7 +887,8 @@ Constant *SymbolicallyEvaluateGEP(const GEPOperator *GEP,
887887
APInt Offset = APInt(
888888
BitWidth,
889889
DL.getIndexedOffsetInType(
890-
SrcElemTy, ArrayRef((Value *const *)Ops.data() + 1, Ops.size() - 1)));
890+
SrcElemTy, ArrayRef((Value *const *)Ops.data() + 1, Ops.size() - 1)),
891+
/*isSigned=*/true, /*implicitTrunc=*/true);
891892

892893
std::optional<ConstantRange> InRange = GEP->getInRange();
893894
if (InRange)

‎llvm/lib/Analysis/Loads.cpp

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -95,10 +95,8 @@ static bool isDereferenceableAndAlignedPointer(
9595

9696
auto IsKnownDeref = [&]() {
9797
bool CheckForNonNull, CheckForFreed;
98-
APInt KnownDerefBytes(Size.getBitWidth(),
99-
V->getPointerDereferenceableBytes(DL, CheckForNonNull,
100-
CheckForFreed));
101-
if (!KnownDerefBytes.getBoolValue() || !KnownDerefBytes.uge(Size) ||
98+
if (!Size.ule(V->getPointerDereferenceableBytes(DL, CheckForNonNull,
99+
CheckForFreed)) ||
102100
CheckForFreed)
103101
return false;
104102
if (CheckForNonNull &&

‎llvm/lib/Analysis/MemoryBuiltins.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -767,6 +767,8 @@ SizeOffsetAPInt ObjectSizeOffsetVisitor::visitAllocaInst(AllocaInst &I) {
767767
TypeSize ElemSize = DL.getTypeAllocSize(I.getAllocatedType());
768768
if (ElemSize.isScalable() && Options.EvalMode != ObjectSizeOpts::Mode::Min)
769769
return ObjectSizeOffsetVisitor::unknown();
770+
if (!isUIntN(IntTyBits, ElemSize.getKnownMinValue()))
771+
return ObjectSizeOffsetVisitor::unknown();
770772
APInt Size(IntTyBits, ElemSize.getKnownMinValue());
771773
if (!I.isArrayAllocation())
772774
return SizeOffsetAPInt(align(Size, I.getAlign()), Zero);

‎llvm/lib/Analysis/ScalarEvolution.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6874,7 +6874,7 @@ const ConstantRange &ScalarEvolution::getRangeRef(
68746874
bool CanBeNull, CanBeFreed;
68756875
uint64_t DerefBytes =
68766876
V->getPointerDereferenceableBytes(DL, CanBeNull, CanBeFreed);
6877-
if (DerefBytes > 1) {
6877+
if (DerefBytes > 1 && isUIntN(BitWidth, DerefBytes)) {
68786878
// The highest address the object can start is DerefBytes bytes before
68796879
// the end (unsigned max value). If this value is not a multiple of the
68806880
// alignment, the last possible start value is the next lowest multiple

‎llvm/lib/Bitcode/Reader/BitcodeReader.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -858,7 +858,8 @@ class BitcodeReader : public BitcodeReaderBase, public GVMaterializer {
858858
} else {
859859
int64_t Start = BitcodeReader::decodeSignRotatedValue(Record[OpNum++]);
860860
int64_t End = BitcodeReader::decodeSignRotatedValue(Record[OpNum++]);
861-
return ConstantRange(APInt(BitWidth, Start), APInt(BitWidth, End));
861+
return ConstantRange(APInt(BitWidth, Start, true),
862+
APInt(BitWidth, End, true));
862863
}
863864
}
864865

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1641,7 +1641,10 @@ SDValue SelectionDAG::getConstant(uint64_t Val, const SDLoc &DL, EVT VT,
16411641
assert((EltVT.getSizeInBits() >= 64 ||
16421642
(uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
16431643
"getConstant with a uint64_t value that doesn't fit in the type!");
1644-
return getConstant(APInt(EltVT.getSizeInBits(), Val), DL, VT, isT, isO);
1644+
// TODO: Avoid implicit trunc?
1645+
return getConstant(APInt(EltVT.getSizeInBits(), Val, /*isSigned=*/false,
1646+
/*implicitTrunc=*/true),
1647+
DL, VT, isT, isO);
16451648
}
16461649

16471650
SDValue SelectionDAG::getConstant(const APInt &Val, const SDLoc &DL, EVT VT,

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4338,7 +4338,8 @@ void SelectionDAGBuilder::visitGetElementPtr(const User &I) {
43384338
GTI.getSequentialElementStride(DAG.getDataLayout());
43394339
// We intentionally mask away the high bits here; ElementSize may not
43404340
// fit in IdxTy.
4341-
APInt ElementMul(IdxSize, ElementSize.getKnownMinValue());
4341+
APInt ElementMul(IdxSize, ElementSize.getKnownMinValue(),
4342+
/*isSigned=*/false, /*implicitTrunc=*/true);
43424343
bool ElementScalable = ElementSize.isScalable();
43434344

43444345
// If this is a scalar constant or a splat vector of constants,

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2200,7 +2200,9 @@ ScheduleDAGSDNodes *SelectionDAGISel::CreateScheduler() {
22002200
bool SelectionDAGISel::CheckAndMask(SDValue LHS, ConstantSDNode *RHS,
22012201
int64_t DesiredMaskS) const {
22022202
const APInt &ActualMask = RHS->getAPIntValue();
2203-
const APInt &DesiredMask = APInt(LHS.getValueSizeInBits(), DesiredMaskS);
2203+
// TODO: Avoid implicit trunc?
2204+
const APInt &DesiredMask = APInt(LHS.getValueSizeInBits(), DesiredMaskS,
2205+
/*isSigned=*/false, /*implicitTrunc=*/true);
22042206

22052207
// If the actual mask exactly matches, success!
22062208
if (ActualMask == DesiredMask)
@@ -2229,7 +2231,9 @@ bool SelectionDAGISel::CheckAndMask(SDValue LHS, ConstantSDNode *RHS,
22292231
bool SelectionDAGISel::CheckOrMask(SDValue LHS, ConstantSDNode *RHS,
22302232
int64_t DesiredMaskS) const {
22312233
const APInt &ActualMask = RHS->getAPIntValue();
2232-
const APInt &DesiredMask = APInt(LHS.getValueSizeInBits(), DesiredMaskS);
2234+
// TODO: Avoid implicit trunc?
2235+
const APInt &DesiredMask = APInt(LHS.getValueSizeInBits(), DesiredMaskS,
2236+
/*isSigned=*/false, /*implicitTrunc=*/true);
22332237

22342238
// If the actual mask exactly matches, success!
22352239
if (ActualMask == DesiredMask)

‎llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -6813,7 +6813,9 @@ TargetLowering::prepareUREMEqFold(EVT SETCCVT, SDValue REMNode,
68136813

68146814
PAmts.push_back(DAG.getConstant(P, DL, SVT));
68156815
KAmts.push_back(
6816-
DAG.getConstant(APInt(ShSVT.getSizeInBits(), K), DL, ShSVT));
6816+
DAG.getConstant(APInt(ShSVT.getSizeInBits(), K, /*isSigned=*/false,
6817+
/*implicitTrunc=*/true),
6818+
DL, ShSVT));
68176819
QAmts.push_back(DAG.getConstant(Q, DL, SVT));
68186820
return true;
68196821
};
@@ -7084,7 +7086,9 @@ TargetLowering::prepareSREMEqFold(EVT SETCCVT, SDValue REMNode,
70847086
PAmts.push_back(DAG.getConstant(P, DL, SVT));
70857087
AAmts.push_back(DAG.getConstant(A, DL, SVT));
70867088
KAmts.push_back(
7087-
DAG.getConstant(APInt(ShSVT.getSizeInBits(), K), DL, ShSVT));
7089+
DAG.getConstant(APInt(ShSVT.getSizeInBits(), K, /*isSigned=*/false,
7090+
/*implicitTrunc=*/true),
7091+
DL, ShSVT));
70887092
QAmts.push_back(DAG.getConstant(Q, DL, SVT));
70897093
return true;
70907094
};

‎llvm/lib/ExecutionEngine/MCJIT/MCJIT.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -588,7 +588,7 @@ GenericValue MCJIT::runFunction(Function *F, ArrayRef<GenericValue> ArgValues) {
588588
return rv;
589589
}
590590
case Type::VoidTyID:
591-
rv.IntVal = APInt(32, ((int(*)())(intptr_t)FPtr)());
591+
rv.IntVal = APInt(32, ((int (*)())(intptr_t)FPtr)(), true);
592592
return rv;
593593
case Type::FloatTyID:
594594
rv.FloatVal = ((float(*)())(intptr_t)FPtr)();

‎llvm/lib/IR/Constants.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -932,7 +932,9 @@ Constant *ConstantInt::get(Type *Ty, uint64_t V, bool isSigned) {
932932
}
933933

934934
ConstantInt *ConstantInt::get(IntegerType *Ty, uint64_t V, bool isSigned) {
935-
return get(Ty->getContext(), APInt(Ty->getBitWidth(), V, isSigned));
935+
// TODO: Avoid implicit trunc?
936+
return get(Ty->getContext(),
937+
APInt(Ty->getBitWidth(), V, isSigned, /*implicitTrunc=*/true));
936938
}
937939

938940
Constant *ConstantInt::get(Type *Ty, const APInt& V) {

‎llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -2359,10 +2359,11 @@ void AArch64TargetLowering::computeKnownBitsForTargetNode(
23592359
}
23602360
case AArch64ISD::BICi: {
23612361
// Compute the bit cleared value.
2362-
uint64_t Mask =
2363-
~(Op->getConstantOperandVal(1) << Op->getConstantOperandVal(2));
2362+
APInt Mask =
2363+
~(Op->getConstantOperandAPInt(1) << Op->getConstantOperandAPInt(2))
2364+
.trunc(Known.getBitWidth());
23642365
Known = DAG.computeKnownBits(Op->getOperand(0), Depth + 1);
2365-
Known &= KnownBits::makeConstant(APInt(Known.getBitWidth(), Mask));
2366+
Known &= KnownBits::makeConstant(Mask);
23662367
break;
23672368
}
23682369
case AArch64ISD::VLSHR: {
@@ -12706,7 +12707,8 @@ static bool isEXTMask(ArrayRef<int> M, EVT VT, bool &ReverseEXT,
1270612707
// Benefit form APInt to handle overflow when calculating expected element.
1270712708
unsigned NumElts = VT.getVectorNumElements();
1270812709
unsigned MaskBits = APInt(32, NumElts * 2).logBase2();
12709-
APInt ExpectedElt = APInt(MaskBits, *FirstRealElt + 1);
12710+
APInt ExpectedElt = APInt(MaskBits, *FirstRealElt + 1, /*isSigned=*/false,
12711+
/*implicitTrunc=*/true);
1271012712
// The following shuffle indices must be the successive elements after the
1271112713
// first real element.
1271212714
bool FoundWrongElt = std::any_of(FirstRealElt + 1, M.end(), [&](int Elt) {
@@ -14173,9 +14175,9 @@ static SDValue NormalizeBuildVector(SDValue Op,
1417314175
// (with operands cast to integers), then the only possibilities
1417414176
// are constants and UNDEFs.
1417514177
if (auto *CstLane = dyn_cast<ConstantSDNode>(Lane)) {
14176-
APInt LowBits(EltTy.getSizeInBits(),
14177-
CstLane->getZExtValue());
14178-
Lane = DAG.getConstant(LowBits.getZExtValue(), dl, MVT::i32);
14178+
Lane = DAG.getConstant(
14179+
CstLane->getAPIntValue().trunc(EltTy.getSizeInBits()).getZExtValue(),
14180+
dl, MVT::i32);
1417914181
} else if (Lane.getNode()->isUndef()) {
1418014182
Lane = DAG.getUNDEF(MVT::i32);
1418114183
} else {
@@ -23978,7 +23980,7 @@ static bool findMoreOptimalIndexType(const MaskedGatherScatterSDNode *N,
2397823980
EVT NewIndexVT = IndexVT.changeVectorElementType(MVT::i32);
2397923981
// Stride does not scale explicitly by 'Scale', because it happens in
2398023982
// the gather/scatter addressing mode.
23981-
Index = DAG.getStepVector(SDLoc(N), NewIndexVT, APInt(32, Stride));
23983+
Index = DAG.getStepVector(SDLoc(N), NewIndexVT, APInt(32, Stride, true));
2398223984
return true;
2398323985
}
2398423986

@@ -28978,7 +28980,7 @@ static SDValue GenerateFixedLengthSVETBL(SDValue Op, SDValue Op1, SDValue Op2,
2897828980
unsigned BitsPerElt = VTOp1.getVectorElementType().getSizeInBits();
2897928981
unsigned IndexLen = MinSVESize / BitsPerElt;
2898028982
unsigned ElementsPerVectorReg = VTOp1.getVectorNumElements();
28981-
uint64_t MaxOffset = APInt(BitsPerElt, -1, false).getZExtValue();
28983+
uint64_t MaxOffset = APInt(BitsPerElt, -1, true).getZExtValue();
2898228984
EVT MaskEltType = VTOp1.getVectorElementType().changeTypeToInteger();
2898328985
EVT MaskType = EVT::getVectorVT(*DAG.getContext(), MaskEltType, IndexLen);
2898428986
bool MinMaxEqual = (MinSVESize == MaxSVESize);
@@ -29336,16 +29338,14 @@ bool AArch64TargetLowering::SimplifyDemandedBitsForTargetNode(
2933629338
KnownBits KnownOp0 =
2933729339
TLO.DAG.computeKnownBits(Op0, OriginalDemandedElts, Depth + 1);
2933829340
// Op0 &= ~(ConstantOperandVal(1) << ConstantOperandVal(2))
29339-
uint64_t BitsToClear = Op->getConstantOperandVal(1)
29340-
<< Op->getConstantOperandVal(2);
29341+
APInt BitsToClear =
29342+
(Op->getConstantOperandAPInt(1) << Op->getConstantOperandAPInt(2))
29343+
.trunc(KnownOp0.getBitWidth());
2934129344
APInt AlreadyZeroedBitsToClear = BitsToClear & KnownOp0.Zero;
29342-
if (APInt(Known.getBitWidth(), BitsToClear)
29343-
.isSubsetOf(AlreadyZeroedBitsToClear))
29345+
if (BitsToClear.isSubsetOf(AlreadyZeroedBitsToClear))
2934429346
return TLO.CombineTo(Op, Op0);
2934529347

29346-
Known = KnownOp0 &
29347-
KnownBits::makeConstant(APInt(Known.getBitWidth(), ~BitsToClear));
29348-
29348+
Known = KnownOp0 & KnownBits::makeConstant(~BitsToClear);
2934929349
return false;
2935029350
}
2935129351
case ISD::INTRINSIC_WO_CHAIN: {

‎llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3426,7 +3426,8 @@ bool SIInstrInfo::foldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
34263426
: AMDGPU::V_MOV_B32_e32
34273427
: Is64Bit ? AMDGPU::S_MOV_B64_IMM_PSEUDO
34283428
: AMDGPU::S_MOV_B32;
3429-
APInt Imm(Is64Bit ? 64 : 32, getImmFor(UseMI.getOperand(1)));
3429+
APInt Imm(Is64Bit ? 64 : 32, getImmFor(UseMI.getOperand(1)),
3430+
/*isSigned=*/true, /*implicitTrunc=*/true);
34303431

34313432
if (RI.isAGPR(*MRI, DstReg)) {
34323433
if (Is64Bit || !isInlineConstant(Imm))

‎llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -213,12 +213,12 @@ static unsigned canModifyToInlineImmOp32(const SIInstrInfo *TII,
213213
// that SCC is not live as S_NOT_B32 clobbers it. It's probably not worth
214214
// it, as the reasonable values are already covered by s_movk_i32.
215215
ModifiedImm = ~SrcImm;
216-
if (TII->isInlineConstant(APInt(32, ModifiedImm)))
216+
if (TII->isInlineConstant(APInt(32, ModifiedImm, true)))
217217
return AMDGPU::V_NOT_B32_e32;
218218
}
219219

220220
ModifiedImm = reverseBits<int32_t>(SrcImm);
221-
if (TII->isInlineConstant(APInt(32, ModifiedImm)))
221+
if (TII->isInlineConstant(APInt(32, ModifiedImm, true)))
222222
return Scalar ? AMDGPU::S_BREV_B32 : AMDGPU::V_BFREV_B32_e32;
223223

224224
return 0;

‎llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1159,7 +1159,9 @@ class ARMOperand : public MCParsedAsmOperand {
11591159
if (!isImm()) return false;
11601160
const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
11611161
if (!CE) return false;
1162-
int Val = ARM_AM::getFP32Imm(APInt(32, CE->getValue()));
1162+
// TODO: Is implicitTrunc correct here?
1163+
int Val = ARM_AM::getFP32Imm(
1164+
APInt(32, CE->getValue(), /*isSigned=*/true, /*implicitTrunc=*/true));
11631165
return Val != -1;
11641166
}
11651167

‎llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2503,7 +2503,8 @@ APInt HexagonConstEvaluator::getCmpImm(unsigned Opc, unsigned OpX,
25032503
}
25042504

25052505
uint64_t Val = MO.getImm();
2506-
return APInt(32, Val, Signed);
2506+
// TODO: Is implicitTrunc correct here?
2507+
return APInt(32, Val, Signed, /*implicitTrunc=*/true);
25072508
}
25082509

25092510
void HexagonConstEvaluator::replaceWithNop(MachineInstr &MI) {

‎llvm/lib/Target/Hexagon/HexagonGenExtract.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -171,7 +171,7 @@ bool HexagonGenExtract::convert(Instruction *In) {
171171
// this value.
172172
if (!LogicalSR && (SR > SL))
173173
return false;
174-
APInt A = APInt(BW, ~0ULL).lshr(SR).shl(SL);
174+
APInt A = APInt(BW, ~0ULL, true).lshr(SR).shl(SL);
175175
CM = ConstantInt::get(Ctx, A);
176176
}
177177

‎llvm/lib/Target/RISCV/RISCVISelLowering.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3576,7 +3576,9 @@ static std::optional<VIDSequence> isSimpleVIDSequence(SDValue Op,
35763576
if (!Elt)
35773577
continue;
35783578
APInt ExpectedVal =
3579-
(APInt(EltSizeInBits, Idx) * *SeqStepNum).sdiv(*SeqStepDenom);
3579+
(APInt(EltSizeInBits, Idx, /*isSigned=*/false, /*implicitTrunc=*/true) *
3580+
*SeqStepNum)
3581+
.sdiv(*SeqStepDenom);
35803582

35813583
APInt Addend = *Elt - ExpectedVal;
35823584
if (!SeqAddend)

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