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| 1 | +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt < %s -S -mtriple=riscv64 -mattr=+v -passes=early-cse -earlycse-debug-hash | FileCheck %s |
| 3 | +; RUN: opt < %s -S -mtriple=riscv64 -mattr=+v -aa-pipeline=basic-aa -passes='early-cse<memssa>' | FileCheck %s |
| 4 | + |
| 5 | +define <vscale x 2 x i32> @test_cse(ptr noundef %base) { |
| 6 | +; CHECK-LABEL: define <vscale x 2 x i32> @test_cse( |
| 7 | +; CHECK-SAME: ptr noundef [[BASE:%.*]]) #[[ATTR0:[0-9]+]] { |
| 8 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 9 | +; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vle.nxv2i32.i64(<vscale x 2 x i32> poison, ptr [[BASE]], i64 8) |
| 10 | +; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vadd.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[TMP0]], i64 8) |
| 11 | +; CHECK-NEXT: ret <vscale x 2 x i32> [[TMP1]] |
| 12 | +; |
| 13 | +entry: |
| 14 | + %0 = call <vscale x 2 x i32> @llvm.riscv.vle.nxv2i32.i64(<vscale x 2 x i32> poison, ptr %base, i64 8) |
| 15 | + %1 = call <vscale x 2 x i32> @llvm.riscv.vle.nxv2i32.i64(<vscale x 2 x i32> poison, ptr %base, i64 8) |
| 16 | + %2 = call <vscale x 2 x i32> @llvm.riscv.vadd.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> %0, <vscale x 2 x i32> %1, i64 8) |
| 17 | + ret <vscale x 2 x i32> %2 |
| 18 | +} |
| 19 | + |
| 20 | +define <vscale x 2 x i32> @test_no_cse(ptr noundef %a, ptr noundef %b) { |
| 21 | +; CHECK-LABEL: define <vscale x 2 x i32> @test_no_cse( |
| 22 | +; CHECK-SAME: ptr noundef [[A:%.*]], ptr noundef [[B:%.*]]) #[[ATTR0]] { |
| 23 | +; CHECK-NEXT: [[ENTRY:.*:]] |
| 24 | +; CHECK-NEXT: [[TMP0:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vle.nxv2i32.i64(<vscale x 2 x i32> poison, ptr [[A]], i64 8) |
| 25 | +; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vle.nxv2i32.i64(<vscale x 2 x i32> poison, ptr [[B]], i64 8) |
| 26 | +; CHECK-NEXT: [[TMP2:%.*]] = call <vscale x 2 x i32> @llvm.riscv.vadd.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> [[TMP0]], <vscale x 2 x i32> [[TMP1]], i64 8) |
| 27 | +; CHECK-NEXT: ret <vscale x 2 x i32> [[TMP2]] |
| 28 | +; |
| 29 | +entry: |
| 30 | + %0 = call <vscale x 2 x i32> @llvm.riscv.vle.nxv2i32.i64(<vscale x 2 x i32> poison, ptr %a, i64 8) |
| 31 | + %1 = call <vscale x 2 x i32> @llvm.riscv.vle.nxv2i32.i64(<vscale x 2 x i32> poison, ptr %b, i64 8) |
| 32 | + %2 = call <vscale x 2 x i32> @llvm.riscv.vadd.nxv2i32.nxv2i32.i64(<vscale x 2 x i32> poison, <vscale x 2 x i32> %0, <vscale x 2 x i32> %1, i64 8) |
| 33 | + ret <vscale x 2 x i32> %2 |
| 34 | +} |
| 35 | + |
| 36 | +; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: read) |
| 37 | +declare <vscale x 2 x i32> @llvm.riscv.vle.nxv2i32.i64(<vscale x 2 x i32>, ptr captures(none), i64) #1 |
| 38 | + |
| 39 | +; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none) |
| 40 | +declare <vscale x 2 x i32> @llvm.riscv.vadd.nxv2i32.nxv2i32.i64(<vscale x 2 x i32>, <vscale x 2 x i32>, <vscale x 2 x i32>, i64) #2 |
| 41 | + |
| 42 | + |
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