Address Luke's comment

Author: HankChang736

llvm/test/CodeGen/RISCV/rvv/vsetvl-cross-inline-asm.ll

@@ -4,13 +4,6 @@
 define void @foo(<vscale x 8 x half> %0, <vscale x 8 x half> %1) {
 ; CHECK-LABEL: foo:
 ; CHECK:       # %bb.0: # %entry
-; CHECK-NEXT:    lui a0, %hi(.LCPI0_0)
-; CHECK-NEXT:    vsetvli a1, zero, e32, m4, ta, ma
-; CHECK-NEXT:    addi a0, a0, %lo(.LCPI0_0)
-; CHECK-NEXT:    vlse32.v v12, (a0), zero
-; CHECK-NEXT:    lui a0, 1
-; CHECK-NEXT:    addiw a0, a0, -1096
-; CHECK-NEXT:    vmv.v.v v16, v12
 ; CHECK-NEXT:    vsetvli a0, zero, e32, m4, ta, ma
 ; CHECK-NEXT:    vmv.v.i v12, 0
 ; CHECK-NEXT:    lui a0, 1
@@ -20,10 +13,6 @@ define void @foo(<vscale x 8 x half> %0, <vscale x 8 x half> %1) {
 ; CHECK-NEXT:    #APP
 ; CHECK-NEXT:    vfmadd.vv v16, v12, v12
 ; CHECK-NEXT:    #NO_APP
-; CHECK-NEXT:    vsetvli zero, a0, e16, m2, ta, ma
-; CHECK-NEXT:    #APP
-; CHECK-NEXT:    vfmadd.vv v16, v12, v12
-; CHECK-NEXT:    #NO_APP
 ; CHECK-NEXT:    #APP
 ; CHECK-NEXT:    vfmadd.vv v16, v12, v12
 ; CHECK-NEXT:    #NO_APP
@@ -37,12 +26,3 @@ entry:
   tail call void @llvm.riscv.vse.nxv8f16.i64(<vscale x 8 x half> %0, ptr null, i64 %2)
   ret void
 }
-
-; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
-declare i64 @llvm.riscv.vsetvli.i64(i64, i64 immarg, i64 immarg) #0
-
-; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: write)
-declare void @llvm.riscv.vse.nxv8f16.i64(<vscale x 8 x half>, ptr nocapture, i64) #1
-
-attributes #0 = { nocallback nofree nosync nounwind willreturn memory(none) }
-attributes #1 = { nocallback nofree nosync nounwind willreturn memory(argmem: write) }