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LiqinWengLiqinWeng
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[LV][VPlan] Add fast flags for selectRecipe (#121023)
Change the inheritance of class VPWidenSelectRecipe to class VPRecipeWithIRFlags, which allows recipe of the select to pass the fastmath flags.The patch of #119847 will add the fastmath flag to for recipe
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6 files changed

+147
-7
lines changed

6 files changed

+147
-7
lines changed

‎llvm/lib/Transforms/Vectorize/VPlan.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1813,11 +1813,10 @@ class VPHistogramRecipe : public VPRecipeBase {
18131813
};
18141814

18151815
/// A recipe for widening select instructions.
1816-
struct VPWidenSelectRecipe : public VPSingleDefRecipe {
1816+
struct VPWidenSelectRecipe : public VPRecipeWithIRFlags {
18171817
template <typename IterT>
18181818
VPWidenSelectRecipe(SelectInst &I, iterator_range<IterT> Operands)
1819-
: VPSingleDefRecipe(VPDef::VPWidenSelectSC, Operands, &I,
1820-
I.getDebugLoc()) {}
1819+
: VPRecipeWithIRFlags(VPDef::VPWidenSelectSC, Operands, I) {}
18211820

18221821
~VPWidenSelectRecipe() override = default;
18231822

‎llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1242,6 +1242,7 @@ void VPWidenSelectRecipe::print(raw_ostream &O, const Twine &Indent,
12421242
O << Indent << "WIDEN-SELECT ";
12431243
printAsOperand(O, SlotTracker);
12441244
O << " = select ";
1245+
printFlags(O);
12451246
getOperand(0)->printAsOperand(O, SlotTracker);
12461247
O << ", ";
12471248
getOperand(1)->printAsOperand(O, SlotTracker);
@@ -1266,6 +1267,8 @@ void VPWidenSelectRecipe::execute(VPTransformState &State) {
12661267
Value *Op1 = State.get(getOperand(2));
12671268
Value *Sel = State.Builder.CreateSelect(Cond, Op0, Op1);
12681269
State.set(this, Sel);
1270+
if (isa<FPMathOperator>(Sel))
1271+
setFlags(cast<Instruction>(Sel));
12691272
State.addMetadata(Sel, dyn_cast_or_null<Instruction>(getUnderlyingValue()));
12701273
}
12711274

‎llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -358,8 +358,8 @@ define float @PR35538_more_FMF(ptr nocapture readonly %a, i32 %N) #0 {
358358
; CHECK-NEXT: [[WIDE_LOAD2:%.*]] = load <4 x float>, ptr [[TMP5]], align 4
359359
; CHECK-NEXT: [[TMP6:%.*]] = fcmp nnan ninf oge <4 x float> [[WIDE_LOAD]], [[VEC_PHI]]
360360
; CHECK-NEXT: [[TMP7:%.*]] = fcmp nnan ninf oge <4 x float> [[WIDE_LOAD2]], [[VEC_PHI1]]
361-
; CHECK-NEXT: [[TMP8]] = select <4 x i1> [[TMP6]], <4 x float> [[WIDE_LOAD]], <4 x float> [[VEC_PHI]]
362-
; CHECK-NEXT: [[TMP9]] = select <4 x i1> [[TMP7]], <4 x float> [[WIDE_LOAD2]], <4 x float> [[VEC_PHI1]]
361+
; CHECK-NEXT: [[TMP8]] = select nnan ninf <4 x i1> [[TMP6]], <4 x float> [[WIDE_LOAD]], <4 x float> [[VEC_PHI]]
362+
; CHECK-NEXT: [[TMP9]] = select nnan ninf <4 x i1> [[TMP7]], <4 x float> [[WIDE_LOAD2]], <4 x float> [[VEC_PHI1]]
363363
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
364364
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
365365
; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]

‎llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -114,7 +114,7 @@ define float @fp_reduction_max(ptr noalias %a, i64 %N) {
114114
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds float, ptr [[TMP1]], i32 0
115115
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
116116
; CHECK-NEXT: [[TMP3:%.*]] = fcmp fast ogt <4 x float> [[VEC_PHI]], [[WIDE_LOAD]]
117-
; CHECK-NEXT: [[TMP4]] = select <4 x i1> [[TMP3]], <4 x float> [[VEC_PHI]], <4 x float> [[WIDE_LOAD]]
117+
; CHECK-NEXT: [[TMP4]] = select fast <4 x i1> [[TMP3]], <4 x float> [[VEC_PHI]], <4 x float> [[WIDE_LOAD]]
118118
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
119119
; CHECK-NEXT: [[TMP5:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
120120
; CHECK-NEXT: br i1 [[TMP5]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
@@ -142,7 +142,7 @@ define float @fp_reduction_max(ptr noalias %a, i64 %N) {
142142
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds float, ptr [[TMP8]], i32 0
143143
; CHECK-NEXT: [[WIDE_LOAD6:%.*]] = load <4 x float>, ptr [[TMP9]], align 4
144144
; CHECK-NEXT: [[TMP10:%.*]] = fcmp fast ogt <4 x float> [[VEC_PHI5]], [[WIDE_LOAD6]]
145-
; CHECK-NEXT: [[TMP11]] = select <4 x i1> [[TMP10]], <4 x float> [[VEC_PHI5]], <4 x float> [[WIDE_LOAD6]]
145+
; CHECK-NEXT: [[TMP11]] = select fast <4 x i1> [[TMP10]], <4 x float> [[VEC_PHI5]], <4 x float> [[WIDE_LOAD6]]
146146
; CHECK-NEXT: [[INDEX_NEXT7]] = add nuw i64 [[INDEX4]], 4
147147
; CHECK-NEXT: [[TMP12:%.*]] = icmp eq i64 [[INDEX_NEXT7]], [[N_VEC3]]
148148
; CHECK-NEXT: br i1 [[TMP12]], label [[VEC_EPILOG_MIDDLE_BLOCK:%.*]], label [[VEC_EPILOG_VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]

‎llvm/test/Transforms/LoopVectorize/select-with-fastflags.ll

Lines changed: 82 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,82 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2+
3+
; RUN: opt < %s -passes=loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -S | FileCheck %s
4+
5+
define void @select_with_fastmath_flags(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
6+
; CHECK-LABEL: define void @select_with_fastmath_flags(
7+
; CHECK-SAME: ptr noalias [[A:%.*]], ptr noalias [[B:%.*]], ptr noalias [[C:%.*]], i64 [[N:%.*]]) {
8+
; CHECK-NEXT: [[ENTRY:.*]]:
9+
; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[N]], 4
10+
; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
11+
; CHECK: [[VECTOR_PH]]:
12+
; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[N]], 4
13+
; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[N]], [[N_MOD_VF]]
14+
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
15+
; CHECK: [[VECTOR_BODY]]:
16+
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
17+
; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[INDEX]], 0
18+
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[TMP0]]
19+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw float, ptr [[TMP1]], i32 0
20+
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <4 x float>, ptr [[TMP2]], align 4
21+
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds nuw float, ptr [[C]], i64 [[TMP0]]
22+
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds nuw float, ptr [[TMP3]], i32 0
23+
; CHECK-NEXT: [[WIDE_LOAD1:%.*]] = load <4 x float>, ptr [[TMP4]], align 4
24+
; CHECK-NEXT: [[TMP5:%.*]] = fcmp fast ogt <4 x float> [[WIDE_LOAD]], [[WIDE_LOAD1]]
25+
; CHECK-NEXT: [[TMP6:%.*]] = fadd fast <4 x float> [[WIDE_LOAD]], splat (float 1.000000e+01)
26+
; CHECK-NEXT: [[TMP7:%.*]] = select fast <4 x i1> [[TMP5]], <4 x float> [[TMP6]], <4 x float> [[WIDE_LOAD1]]
27+
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[TMP0]]
28+
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw float, ptr [[TMP8]], i32 0
29+
; CHECK-NEXT: store <4 x float> [[TMP7]], ptr [[TMP9]], align 4
30+
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
31+
; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
32+
; CHECK-NEXT: br i1 [[TMP10]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
33+
; CHECK: [[MIDDLE_BLOCK]]:
34+
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[N]], [[N_VEC]]
35+
; CHECK-NEXT: br i1 [[CMP_N]], label %[[EXIT:.*]], label %[[SCALAR_PH]]
36+
; CHECK: [[SCALAR_PH]]:
37+
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], %[[MIDDLE_BLOCK]] ], [ 0, %[[ENTRY]] ]
38+
; CHECK-NEXT: br label %[[FOR_BODY:.*]]
39+
; CHECK: [[FOR_BODY]]:
40+
; CHECK-NEXT: [[IV:%.*]] = phi i64 [ [[IV_NEXT:%.*]], %[[FOR_BODY]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
41+
; CHECK-NEXT: [[GEP:%.*]] = getelementptr inbounds nuw float, ptr [[B]], i64 [[IV]]
42+
; CHECK-NEXT: [[TMP11:%.*]] = load float, ptr [[GEP]], align 4
43+
; CHECK-NEXT: [[GEP3:%.*]] = getelementptr inbounds nuw float, ptr [[C]], i64 [[IV]]
44+
; CHECK-NEXT: [[TMP12:%.*]] = load float, ptr [[GEP3]], align 4
45+
; CHECK-NEXT: [[CMP4:%.*]] = fcmp fast ogt float [[TMP11]], [[TMP12]]
46+
; CHECK-NEXT: [[ADD:%.*]] = fadd fast float [[TMP11]], 1.000000e+01
47+
; CHECK-NEXT: [[COND:%.*]] = select fast i1 [[CMP4]], float [[ADD]], float [[TMP12]]
48+
; CHECK-NEXT: [[GEP11:%.*]] = getelementptr inbounds nuw float, ptr [[A]], i64 [[IV]]
49+
; CHECK-NEXT: store float [[COND]], ptr [[GEP11]], align 4
50+
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i64 [[IV]], 1
51+
; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[IV_NEXT]], [[N]]
52+
; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label %[[EXIT]], label %[[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]]
53+
; CHECK: [[EXIT]]:
54+
; CHECK-NEXT: ret void
55+
;
56+
entry:
57+
br label %for.body
58+
59+
for.body:
60+
%iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
61+
%gep = getelementptr inbounds nuw float, ptr %b, i64 %iv
62+
%0 = load float, ptr %gep, align 4
63+
%gep3 = getelementptr inbounds nuw float, ptr %c, i64 %iv
64+
%1 = load float, ptr %gep3, align 4
65+
%cmp4 = fcmp fast ogt float %0, %1
66+
%add = fadd fast float %0, 1.000000e+01
67+
%cond = select fast i1 %cmp4, float %add, float %1
68+
%gep11 = getelementptr inbounds nuw float, ptr %a, i64 %iv
69+
store float %cond, ptr %gep11, align 4
70+
%iv.next = add nuw nsw i64 %iv, 1
71+
%exitcond.not = icmp eq i64 %iv.next, %N
72+
br i1 %exitcond.not, label %exit, label %for.body
73+
74+
exit:
75+
ret void
76+
}
77+
78+
; CHECK: [[LOOP0]] = distinct !{[[LOOP0]], [[META1:![0-9]+]], [[META2:![0-9]+]]}
79+
; CHECK: [[META1]] = !{!"llvm.loop.isvectorized", i32 1}
80+
; CHECK: [[META2]] = !{!"llvm.loop.unroll.runtime.disable"}
81+
; CHECK: [[LOOP3]] = distinct !{[[LOOP3]], [[META2]], [[META1]]}
82+
;.

‎llvm/test/Transforms/LoopVectorize/vplan-printing.ll

Lines changed: 56 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1200,6 +1200,62 @@ exit:
12001200
ret i16 %for.1
12011201
}
12021202

1203+
define void @print_select_with_fastmath_flags(ptr noalias %a, ptr noalias %b, ptr noalias %c, i64 %N) {
1204+
; CHECK-LABEL: 'print_select_with_fastmath_flags'
1205+
; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1'
1206+
; CHECK-NEXT: Live-in vp<[[VFUF:%.+]]> = VF * UF
1207+
; CHECK-NEXT: Live-in vp<[[VTC:%.+]]> = vector-trip-count
1208+
; CHECK-NEXT: Live-in ir<%N> = original trip-count
1209+
; CHECK-EMPTY:
1210+
; CHECK-NEXT: ir-bb<entry>:
1211+
; CHECK-NEXT: Successor(s): vector.ph
1212+
; CHECK-EMPTY:
1213+
; CHECK-NEXT: vector.ph:
1214+
; CHECK-NEXT: Successor(s): vector loop
1215+
; CHECK-EMPTY:
1216+
; CHECK: <x1> vector loop: {
1217+
; CHECK-NEXT: vector.body:
1218+
; CHECK-NEXT: EMIT vp<[[IV:%.+]]> = CANONICAL-INDUCTION ir<0>, vp<[[IV_NEXT_EXIT:%.+]]>
1219+
; CHECK-NEXT: vp<[[ST:%.+]]> = SCALAR-STEPS vp<[[IV]]>, ir<1>
1220+
; CHECK-NEXT: CLONE ir<[[GEP1:%.+]]> = getelementptr inbounds nuw ir<%b>, vp<[[ST]]>
1221+
; CHECK-NEXT: vp<[[PTR1:%.+]]> = vector-pointer ir<[[GEP1]]>
1222+
; CHECK-NEXT: WIDEN ir<[[LD1:%.+]]> = load vp<[[PTR1]]>
1223+
; CHECK-NEXT: CLONE ir<[[GEP2:%.+]]> = getelementptr inbounds nuw ir<%c>, vp<[[ST]]>
1224+
; CHECK-NEXT: vp<[[PTR2:%.+]]> = vector-pointer ir<[[GEP2]]>
1225+
; CHECK-NEXT: WIDEN ir<[[LD2:%.+]]> = load vp<[[PTR2]]>
1226+
; CHECK-NEXT: WIDEN ir<[[FCMP:%.+]]> = fcmp ogt ir<[[LD1]]>, ir<[[LD2]]>
1227+
; CHECK-NEXT: WIDEN ir<[[FADD:%.+]]> = fadd reassoc nnan ninf nsz arcp contract afn ir<[[LD1]]>, ir<1.000000e+01>
1228+
; CHECK-NEXT: WIDEN-SELECT ir<[[SELECT:%.+]]> = select reassoc nnan ninf nsz arcp contract afn ir<[[FCMP]]>, ir<[[FADD]]>, ir<[[LD2]]>
1229+
; CHECK-NEXT: CLONE ir<[[GEP3:%.+]]> = getelementptr inbounds nuw ir<%a>, vp<[[ST]]>
1230+
; CHECK-NEXT: vp<[[PTR3:%.+]]> = vector-pointer ir<[[GEP3]]>
1231+
; CHECK-NEXT: WIDEN store vp<[[PTR3]]>, ir<[[SELECT]]>
1232+
; CHECK-NEXT: EMIT vp<[[IV_NEXT_EXIT]]> = add nuw vp<[[IV]]>, vp<[[VFUF]]>
1233+
; CHECK-NEXT: EMIT branch-on-count vp<[[IV_NEXT_EXIT]]>, vp<[[VTC]]>
1234+
; CHECK-NEXT: No successors
1235+
; CHECK-NEXT: }
1236+
1237+
entry:
1238+
br label %for.body
1239+
1240+
for.body:
1241+
%iv = phi i64 [ %iv.next, %for.body ], [ 0, %entry ]
1242+
%gep = getelementptr inbounds nuw float, ptr %b, i64 %iv
1243+
%0 = load float, ptr %gep, align 4
1244+
%gep3 = getelementptr inbounds nuw float, ptr %c, i64 %iv
1245+
%1 = load float, ptr %gep3, align 4
1246+
%cmp4 = fcmp fast ogt float %0, %1
1247+
%add = fadd fast float %0, 1.000000e+01
1248+
%cond = select fast i1 %cmp4, float %add, float %1
1249+
%gep11 = getelementptr inbounds nuw float, ptr %a, i64 %iv
1250+
store float %cond, ptr %gep11, align 4
1251+
%iv.next = add nuw nsw i64 %iv, 1
1252+
%exitcond.not = icmp eq i64 %iv.next, %N
1253+
br i1 %exitcond.not, label %exit, label %for.body
1254+
1255+
exit:
1256+
ret void
1257+
}
1258+
12031259
!llvm.dbg.cu = !{!0}
12041260
!llvm.module.flags = !{!3, !4}
12051261

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