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[SelectionDAG] Fix mismatched truncate when combine BUILD_VECTOR with…
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… EXTRACT_SUBVECTOR

Just use correct type for truncation. Fixes PR59625

Differential Revision: https://reviews.llvm.org/D145757
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junparser committed Mar 13, 2023
1 parent 57b78fa commit 00eef4f
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Showing 2 changed files with 19 additions and 1 deletion.
2 changes: 1 addition & 1 deletion llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -23525,7 +23525,7 @@ SDValue DAGCombiner::visitEXTRACT_SUBVECTOR(SDNode *N) {
if (NumElems == 1) {
SDValue Src = V->getOperand(IdxVal);
if (EltVT != Src.getValueType())
Src = DAG.getNode(ISD::TRUNCATE, SDLoc(N), InVT, Src);
Src = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Src);
return DAG.getBitcast(NVT, Src);
}

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18 changes: 18 additions & 0 deletions llvm/test/CodeGen/WebAssembly/pr59625.ll
Original file line number Diff line number Diff line change
@@ -0,0 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc < %s -mtriple=wasm32-- -mattr=+simd128 | FileCheck --check-prefix=CHECK %s
; RUN: llc < %s -mtriple=wasm64-- -mattr=+simd128 | FileCheck --check-prefix=CHECK %s

define <1 x i16> @f(<1 x i16> %0) {
; CHECK-LABEL: f:
; CHECK: .functype f (v128) -> (v128)
; CHECK-NEXT: # %bb.0: # %BB
; CHECK-NEXT: v128.const 0, 0, 0, 0, 0, 0, 0, 0
; CHECK-NEXT: # fallthrough-return
BB:
%B2 = srem <1 x i16> %0, %0
br label %BB1

BB1: ; preds = %BB
%B = urem <1 x i16> %B2, <i16 3>
ret <1 x i16> %B
}

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