@@ -154,4 +154,64 @@ module {
154154 // MLIR-NEXT: ^bb6: // pred: ^bb4
155155 // MLIR-NEXT: llvm.br ^bb7
156156
157+ // Test do-while cir.loop operation lowering.
158+ cir.func @testDoWhile(%arg0: !s32i) {
159+ %0 = cir.alloca !s32i, cir.ptr <!s32i>, ["i", init] {alignment = 4 : i64}
160+ cir.store %arg0, %0 : !s32i, cir.ptr <!s32i>
161+ cir.scope {
162+ cir.loop dowhile(cond : {
163+ %1 = cir.load %0 : cir.ptr <!s32i>, !s32i
164+ %2 = cir.const(#cir.int<10> : !s32i) : !s32i
165+ %3 = cir.cmp(lt, %1, %2) : !s32i, !s32i
166+ %4 = cir.cast(int_to_bool, %3 : !s32i), !cir.bool
167+ cir.brcond %4 ^bb1, ^bb2
168+ ^bb1: // pred: ^bb0
169+ cir.yield continue
170+ ^bb2: // pred: ^bb0
171+ cir.yield
172+ }, step : {
173+ cir.yield
174+ }) {
175+ %1 = cir.load %0 : cir.ptr <!s32i>, !s32i
176+ %2 = cir.unary(inc, %1) : !s32i, !s32i
177+ cir.store %2, %0 : !s32i, cir.ptr <!s32i>
178+ cir.yield
179+ }
180+ }
181+ cir.return
182+ }
183+
184+ // MLIR: llvm.func @testDoWhile(%arg0: i32) {
185+ // MLIR-NEXT: %0 = llvm.mlir.constant(1 : index) : i64
186+ // MLIR-NEXT: %1 = llvm.alloca %0 x i32 {alignment = 4 : i64} : (i64) -> !llvm.ptr<i32>
187+ // MLIR-NEXT: llvm.store %arg0, %1 : !llvm.ptr<i32>
188+ // MLIR-NEXT: llvm.br ^bb1
189+ // MLIR-NEXT: ^bb1:
190+ // MLIR-NEXT: llvm.br ^bb5
191+ // ============= Condition block =============
192+ // MLIR-NEXT: ^bb2:
193+ // MLIR-NEXT: %2 = llvm.load %1 : !llvm.ptr<i32>
194+ // MLIR-NEXT: %3 = llvm.mlir.constant(10 : i32) : i32
195+ // MLIR-NEXT: %4 = llvm.icmp "slt" %2, %3 : i32
196+ // MLIR-NEXT: %5 = llvm.zext %4 : i1 to i32
197+ // MLIR-NEXT: %6 = llvm.mlir.constant(0 : i32) : i32
198+ // MLIR-NEXT: %7 = llvm.icmp "ne" %5, %6 : i32
199+ // MLIR-NEXT: %8 = llvm.zext %7 : i1 to i8
200+ // MLIR-NEXT: %9 = llvm.trunc %8 : i8 to i1
201+ // MLIR-NEXT: llvm.cond_br %9, ^bb3, ^bb4
202+ // MLIR-NEXT: ^bb3:
203+ // MLIR-NEXT: llvm.br ^bb5
204+ // MLIR-NEXT: ^bb4:
205+ // MLIR-NEXT: llvm.br ^bb6
206+ // ============= Body block =============
207+ // MLIR-NEXT: ^bb5:
208+ // MLIR-NEXT: %10 = llvm.load %1 : !llvm.ptr<i32>
209+ // MLIR-NEXT: %11 = llvm.mlir.constant(1 : i32) : i32
210+ // MLIR-NEXT: %12 = llvm.add %10, %11 : i32
211+ // MLIR-NEXT: llvm.store %12, %1 : !llvm.ptr<i32>
212+ // MLIR-NEXT: llvm.br ^bb2
213+ // ============= Exit block =============
214+ // MLIR-NEXT: ^bb6:
215+ // MLIR-NEXT: llvm.br ^bb7
216+
157217}
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