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rengolinrengolin
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Enable EHABI by default
After all hard work to implement the EHABI and with the test-suite passing, it's time to turn it on by default and allow users to disable it as a work-around while we fix the eventual bugs that show up. This commit also remove the -arm-enable-ehabi-descriptors, since we want the tables to be printed every time the EHABI is turned on for non-Darwin ARM targets. Although MCJIT EHABI is not working yet (needs linking with the right libraries), this commit also fixes some relocations on MCJIT regarding the EH tables/lib calls, and update some tests to avoid using EH tables when none are needed. The EH tests in the test-suite that were previously disabled on ARM now pass with these changes, so a follow-up commit on the test-suite will re-enable them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@200388 91177308-0d34-0410-b5e6-96231b3b80d8
1 parent b04ddad commit 3fca788

23 files changed

+63
-58
lines changed

‎lib/CodeGen/AsmPrinter/ARMException.cpp

Lines changed: 14 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -36,12 +36,6 @@
3636
#include "llvm/Target/TargetRegisterInfo.h"
3737
using namespace llvm;
3838

39-
static cl::opt<bool>
40-
EnableARMEHABIDescriptors("arm-enable-ehabi-descriptors", cl::Hidden,
41-
cl::desc("Generate ARM EHABI tables with unwinding descriptors"),
42-
cl::init(false));
43-
44-
4539
ARMException::ARMException(AsmPrinter *A)
4640
: DwarfException(A) {}
4741

@@ -74,25 +68,23 @@ void ARMException::endFunction(const MachineFunction *) {
7468
Asm->OutStreamer.EmitLabel(Asm->GetTempSymbol("eh_func_end",
7569
Asm->getFunctionNumber()));
7670

77-
if (EnableARMEHABIDescriptors) {
78-
// Map all labels and get rid of any dead landing pads.
79-
MMI->TidyLandingPads();
71+
// Map all labels and get rid of any dead landing pads.
72+
MMI->TidyLandingPads();
8073

81-
if (!MMI->getLandingPads().empty()) {
82-
// Emit references to personality.
83-
if (const Function * Personality =
84-
MMI->getPersonalities()[MMI->getPersonalityIndex()]) {
85-
MCSymbol *PerSym = Asm->getSymbol(Personality);
86-
Asm->OutStreamer.EmitSymbolAttribute(PerSym, MCSA_Global);
87-
ATS.emitPersonality(PerSym);
88-
}
74+
if (!MMI->getLandingPads().empty()) {
75+
// Emit references to personality.
76+
if (const Function * Personality =
77+
MMI->getPersonalities()[MMI->getPersonalityIndex()]) {
78+
MCSymbol *PerSym = Asm->getSymbol(Personality);
79+
Asm->OutStreamer.EmitSymbolAttribute(PerSym, MCSA_Global);
80+
ATS.emitPersonality(PerSym);
81+
}
8982

90-
// Emit .handlerdata directive.
91-
ATS.emitHandlerData();
83+
// Emit .handlerdata directive.
84+
ATS.emitHandlerData();
9285

93-
// Emit actual exception table
94-
EmitExceptionTable();
95-
}
86+
// Emit actual exception table
87+
EmitExceptionTable();
9688
}
9789
}
9890

‎lib/ExecutionEngine/RuntimeDyld/RuntimeDyldELF.cpp

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -481,8 +481,11 @@ void RuntimeDyldELF::resolveARMRelocation(const SectionEntry &Section,
481481
default:
482482
llvm_unreachable("Not implemented relocation type!");
483483

484+
case ELF::R_ARM_NONE:
485+
break;
484486
// Write a 32bit value to relocation address, taking into account the
485487
// implicit addend encoded in the target.
488+
case ELF::R_ARM_PREL31:
486489
case ELF::R_ARM_TARGET1:
487490
case ELF::R_ARM_ABS32:
488491
*TargetPtr = *Placeholder + Value;

‎lib/Target/ARM/ARMAsmPrinter.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1106,7 +1106,7 @@ void ARMAsmPrinter::EmitUnwindingInstruction(const MachineInstr *MI) {
11061106
}
11071107
}
11081108

1109-
extern cl::opt<bool> EnableARMEHABI;
1109+
extern cl::opt<bool> DisableARMEHABI;
11101110

11111111
// Simple pseudo-instructions have their lowering (with expansion to real
11121112
// instructions) auto-generated.
@@ -1122,7 +1122,8 @@ void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
11221122
}
11231123

11241124
// Emit unwinding stuff for frame-related instructions
1125-
if (EnableARMEHABI && MI->getFlag(MachineInstr::FrameSetup))
1125+
if (Subtarget->isTargetEHABICompatible() && !DisableARMEHABI &&
1126+
MI->getFlag(MachineInstr::FrameSetup))
11261127
EmitUnwindingInstruction(MI);
11271128

11281129
// Do any auto-generated pseudo lowerings.

‎lib/Target/ARM/ARMSubtarget.h

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -328,6 +328,16 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
328328
!isTargetDarwin();
329329
}
330330

331+
// ARM Targets that support EHABI exception handling standard
332+
// Darwin uses SjLj. Other targets might need more checks.
333+
bool isTargetEHABICompatible() const {
334+
return (TargetTriple.getEnvironment() == Triple::EABI ||
335+
TargetTriple.getEnvironment() == Triple::GNUEABI ||
336+
TargetTriple.getEnvironment() == Triple::EABIHF ||
337+
TargetTriple.getEnvironment() == Triple::GNUEABIHF) &&
338+
!isTargetDarwin();
339+
}
340+
331341
bool isTargetHardFloat() const {
332342
return TargetTriple.getEnvironment() == Triple::GNUEABIHF ||
333343
TargetTriple.getEnvironment() == Triple::EABIHF;

‎lib/Target/ARM/MCTargetDesc/ARMMCAsmInfo.cpp

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -16,9 +16,11 @@
1616

1717
using namespace llvm;
1818

19+
// ARM EHABI is experimental but the quality is good enough
20+
// to be turned on by default on non-Darwin ARM targets.
1921
cl::opt<bool>
20-
EnableARMEHABI("arm-enable-ehabi", cl::Hidden,
21-
cl::desc("Generate ARM EHABI tables"),
22+
DisableARMEHABI("arm-disable-ehabi", cl::Hidden,
23+
cl::desc("Disable ARM experimental exception handling"),
2224
cl::init(false));
2325

2426

@@ -52,7 +54,7 @@ ARMELFMCAsmInfo::ARMELFMCAsmInfo() {
5254
SupportsDebugInformation = true;
5355

5456
// Exceptions handling
55-
if (EnableARMEHABI)
57+
if (!DisableARMEHABI)
5658
ExceptionsType = ExceptionHandling::ARM;
5759

5860
// foo(plt) instead of foo@plt

‎test/CodeGen/ARM/arm-ttype-target2.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: llc -mtriple=armv7-none-linux-gnueabi -arm-enable-ehabi -arm-enable-ehabi-descriptors < %s | FileCheck %s
1+
; RUN: llc -mtriple=armv7-none-linux-gnueabi < %s | FileCheck %s
22

33
@_ZTVN10__cxxabiv117__class_type_infoE = external global i8*
44
@_ZTS3Foo = linkonce_odr constant [5 x i8] c"3Foo\00"

‎test/CodeGen/ARM/ehabi-filters.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: llc -arm-enable-ehabi -arm-enable-ehabi-descriptors < %s | FileCheck %s
1+
; RUN: llc < %s | FileCheck %s
22
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
33
target triple = "armv7-none-linux-gnueabi"
44

‎test/CodeGen/ARM/ehabi-no-landingpad.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,4 @@
1-
; RUN: llc < %s -mtriple=armv7-unknown-linux-gnueabi \
2-
; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors | FileCheck %s
1+
; RUN: llc < %s -mtriple=armv7-unknown-linux-gnueabi | FileCheck %s
32

43
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:64:128-a0:0:64-n32-S64"
54
target triple = "armv7-unknown-linux-gnueabi"

‎test/CodeGen/ARM/ehabi-unwind.ll

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,7 @@
11
; Test that the EHABI unwind instruction generator does not encounter any
22
; unfamiliar instructions.
3-
; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi -disable-fp-elim
4-
; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi
5-
; RUN: llc < %s -mtriple=thumbv7 -arm-enable-ehabi -arm-enable-ehabi-descriptors
3+
; RUN: llc < %s -mtriple=thumbv7 -disable-fp-elim
4+
; RUN: llc < %s -mtriple=thumbv7
65

76
define void @_Z1fv() nounwind {
87
entry:

‎test/CodeGen/ARM/ehabi.ll

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -19,22 +19,18 @@
1919
; (4) armv7 without -disable-fp-elim
2020

2121
; RUN: llc -mtriple arm-unknown-linux-gnueabi \
22-
; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
2322
; RUN: -disable-fp-elim -filetype=asm -o - %s \
2423
; RUN: | FileCheck %s --check-prefix=CHECK-FP
2524

2625
; RUN: llc -mtriple arm-unknown-linux-gnueabi \
27-
; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
2826
; RUN: -filetype=asm -o - %s \
2927
; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM
3028

3129
; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
32-
; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
3330
; RUN: -disable-fp-elim -filetype=asm -o - %s \
3431
; RUN: | FileCheck %s --check-prefix=CHECK-V7-FP
3532

3633
; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
37-
; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
3834
; RUN: -filetype=asm -o - %s \
3935
; RUN: | FileCheck %s --check-prefix=CHECK-V7-FP-ELIM
4036

‎test/CodeGen/ARM/setcc-sentinals.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
; RUN: llc < %s -mcpu=cortex-a8 -march=arm -asm-verbose=false | FileCheck %s
1+
; RUN: llc < %s -mcpu=cortex-a8 -march=arm -asm-verbose=false -arm-disable-ehabi | FileCheck %s
22

33
define zeroext i1 @test0(i32 %x) nounwind {
44
; CHECK-LABEL: test0:

‎test/CodeGen/Thumb2/constant-islands.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,7 @@
1-
; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o
2-
; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o
3-
; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o
4-
; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o
1+
; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o -arm-disable-ehabi
2+
; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O0 -filetype=obj -o %t.o -arm-disable-ehabi
3+
; RUN: llc < %s -march=arm -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o -arm-disable-ehabi
4+
; RUN: llc < %s -march=thumb -mcpu=cortex-a8 -O2 -filetype=obj -verify-machineinstrs -o %t.o -arm-disable-ehabi
55
target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32-S32"
66
target triple = "thumbv7-apple-ios"
77

‎test/ExecutionEngine/MCJIT/remote/Inputs/cross-module-b.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
declare i32 @FA()
22

3-
define i32 @FB() {
3+
define i32 @FB() nounwind {
44
%r = call i32 @FA( ) ; <i32> [#uses=1]
55
ret i32 %r
66
}

‎test/ExecutionEngine/MCJIT/remote/Inputs/multi-module-b.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
declare i32 @FC()
22

3-
define i32 @FB() {
3+
define i32 @FB() nounwind {
44
%r = call i32 @FC( ) ; <i32> [#uses=1]
55
ret i32 %r
66
}

‎test/ExecutionEngine/MCJIT/remote/Inputs/multi-module-c.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
define i32 @FC() {
1+
define i32 @FC() nounwind {
22
ret i32 0
33
}
44

‎test/ExecutionEngine/MCJIT/remote/cross-module-a.ll

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2,12 +2,11 @@
22

33
declare i32 @FB()
44

5-
define i32 @FA() {
5+
define i32 @FA() nounwind {
66
ret i32 0
77
}
88

9-
define i32 @main() {
9+
define i32 @main() nounwind {
1010
%r = call i32 @FB( ) ; <i32> [#uses=1]
1111
ret i32 %r
1212
}
13-

‎test/ExecutionEngine/MCJIT/remote/multi-module-a.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22

33
declare i32 @FB()
44

5-
define i32 @main() {
5+
define i32 @main() nounwind {
66
%r = call i32 @FB( ) ; <i32> [#uses=1]
77
ret i32 %r
88
}

‎test/ExecutionEngine/MCJIT/remote/simpletest-remote.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,10 @@
11
; RUN: %lli_mcjit -remote-mcjit -mcjit-remote-process=lli-child-target%exeext %s > /dev/null
22

3-
define i32 @bar() {
3+
define i32 @bar() nounwind {
44
ret i32 0
55
}
66

7-
define i32 @main() {
7+
define i32 @main() nounwind {
88
%r = call i32 @bar( ) ; <i32> [#uses=1]
99
ret i32 %r
1010
}

‎test/ExecutionEngine/MCJIT/remote/test-data-align-remote.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,7 @@
33
; Check that a variable is always aligned as specified.
44

55
@var = global i32 0, align 32
6-
define i32 @main() {
6+
define i32 @main() nounwind {
77
%addr = ptrtoint i32* @var to i64
88
%mask = and i64 %addr, 31
99
%tst = icmp eq i64 %mask, 0

‎test/ExecutionEngine/MCJIT/remote/test-fp-no-external-funcs-remote.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; RUN: %lli_mcjit -remote-mcjit -mcjit-remote-process=lli-child-target%exeext %s > /dev/null
22

3-
define double @test(double* %DP, double %Arg) {
3+
define double @test(double* %DP, double %Arg) nounwind {
44
%D = load double* %DP ; <double> [#uses=1]
55
%V = fadd double %D, 1.000000e+00 ; <double> [#uses=2]
66
%W = fsub double %V, %V ; <double> [#uses=3]
@@ -12,7 +12,7 @@ define double @test(double* %DP, double %Arg) {
1212
ret double %Y
1313
}
1414

15-
define i32 @main() {
15+
define i32 @main() nounwind {
1616
%X = alloca double ; <double*> [#uses=2]
1717
store double 0.000000e+00, double* %X
1818
call double @test( double* %X, double 2.000000e+00 ) ; <double>:1 [#uses=0]

‎test/ExecutionEngine/MCJIT/remote/test-global-init-nonzero-remote.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22

33
@count = global i32 1, align 4
44

5-
define i32 @main() nounwind uwtable {
5+
define i32 @main() nounwind {
66
entry:
77
%retval = alloca i32, align 4
88
%i = alloca i32, align 4

‎test/MC/ARM/data-in-code.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
1-
;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort \
1+
;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort -arm-disable-ehabi \
22
;; RUN: -mtriple=armv7-linux-gnueabi -filetype=obj %s -o - | \
33
;; RUN: llvm-readobj -t | FileCheck -check-prefix=ARM %s
44

5-
;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort \
5+
;; RUN: llc -O0 -verify-machineinstrs -fast-isel-abort -arm-disable-ehabi \
66
;; RUN: -mtriple=thumbv7-linux-gnueabi -filetype=obj %s -o - | \
77
;; RUN: llvm-readobj -t | FileCheck -check-prefix=TMB %s
88

‎test/MC/ARM/elf-thumbfunc-reloc.ll

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,10 @@ entry:
3232
; CHECK-NEXT: Section (2) .rel.text {
3333
; CHECK-NEXT: 0x8 R_ARM_THM_CALL foo 0x0
3434
; CHECK-NEXT: }
35+
; CHECK-NEXT: Section (7) .rel.ARM.exidx {
36+
; CHECK-NEXT: 0x0 R_ARM_PREL31 .text 0x0
37+
; CHECK-NEXT: 0x8 R_ARM_PREL31 .text 0x0
38+
; CHECK-NEXT: }
3539
; CHECK-NEXT: ]
3640

3741
; make sure foo is thumb function: bit 0 = 1

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