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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
| 2 | +/* Copyright (C) 2021-2025, Shanghai Yunsilicon Technology Co., Ltd. |
| 3 | + * All rights reserved. |
| 4 | + */ |
| 5 | + |
| 6 | +#include <linux/tcp.h> |
| 7 | + |
| 8 | +#include "xsc_eth.h" |
| 9 | +#include "xsc_eth_txrx.h" |
| 10 | + |
| 11 | +#define XSC_OPCODE_RAW 7 |
| 12 | + |
| 13 | +static void xsc_dma_push(struct xsc_sq *sq, dma_addr_t addr, u32 size, |
| 14 | + enum xsc_dma_map_type map_type) |
| 15 | +{ |
| 16 | + struct xsc_sq_dma *dma = xsc_dma_get(sq, sq->dma_fifo_pc++); |
| 17 | + |
| 18 | + dma->addr = addr; |
| 19 | + dma->size = size; |
| 20 | + dma->type = map_type; |
| 21 | +} |
| 22 | + |
| 23 | +static void xsc_dma_unmap_wqe(struct xsc_sq *sq, u8 num_dma) |
| 24 | +{ |
| 25 | + struct xsc_adapter *adapter = sq->channel->adapter; |
| 26 | + struct device *dev = adapter->dev; |
| 27 | + int i; |
| 28 | + |
| 29 | + for (i = 0; i < num_dma; i++) { |
| 30 | + struct xsc_sq_dma *last_pushed_dma; |
| 31 | + |
| 32 | + last_pushed_dma = xsc_dma_get(sq, --sq->dma_fifo_pc); |
| 33 | + xsc_tx_dma_unmap(dev, last_pushed_dma); |
| 34 | + } |
| 35 | +} |
| 36 | + |
| 37 | +static void *xsc_sq_fetch_wqe(struct xsc_sq *sq, size_t size, u16 *pi) |
| 38 | +{ |
| 39 | + struct xsc_wq_cyc *wq = &sq->wq; |
| 40 | + void *wqe; |
| 41 | + |
| 42 | + /*caution, sp->pc is default to be zero*/ |
| 43 | + *pi = xsc_wq_cyc_ctr2ix(wq, sq->pc); |
| 44 | + wqe = xsc_wq_cyc_get_wqe(wq, *pi); |
| 45 | + memset(wqe, 0, size); |
| 46 | + |
| 47 | + return wqe; |
| 48 | +} |
| 49 | + |
| 50 | +static u16 xsc_tx_get_gso_ihs(struct xsc_sq *sq, struct sk_buff *skb) |
| 51 | +{ |
| 52 | + u16 ihs; |
| 53 | + |
| 54 | + if (skb->encapsulation) { |
| 55 | + ihs = skb_inner_transport_offset(skb) + inner_tcp_hdrlen(skb); |
| 56 | + } else { |
| 57 | + if (skb_shinfo(skb)->gso_type & SKB_GSO_UDP_L4) |
| 58 | + ihs = skb_transport_offset(skb) + sizeof(struct udphdr); |
| 59 | + else |
| 60 | + ihs = skb_transport_offset(skb) + tcp_hdrlen(skb); |
| 61 | + } |
| 62 | + |
| 63 | + return ihs; |
| 64 | +} |
| 65 | + |
| 66 | +static void xsc_txwqe_build_cseg_csum(struct xsc_sq *sq, |
| 67 | + struct sk_buff *skb, |
| 68 | + struct xsc_send_wqe_ctrl_seg *cseg) |
| 69 | +{ |
| 70 | + u32 val = le32_to_cpu(cseg->data0); |
| 71 | + |
| 72 | + if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) { |
| 73 | + if (skb->encapsulation) |
| 74 | + val |= FIELD_PREP(XSC_WQE_CTRL_SEG_CSUM_EN_MASK, |
| 75 | + XSC_ETH_WQE_INNER_AND_OUTER_CSUM); |
| 76 | + else |
| 77 | + val |= FIELD_PREP(XSC_WQE_CTRL_SEG_CSUM_EN_MASK, |
| 78 | + XSC_ETH_WQE_OUTER_CSUM); |
| 79 | + } else { |
| 80 | + val |= FIELD_PREP(XSC_WQE_CTRL_SEG_CSUM_EN_MASK, |
| 81 | + XSC_ETH_WQE_NONE_CSUM); |
| 82 | + } |
| 83 | + cseg->data0 = cpu_to_le32(val); |
| 84 | +} |
| 85 | + |
| 86 | +static void xsc_txwqe_build_csegs(struct xsc_sq *sq, struct sk_buff *skb, |
| 87 | + u16 mss, u16 ihs, u16 headlen, |
| 88 | + u8 opcode, u16 ds_cnt, u32 msglen, |
| 89 | + struct xsc_send_wqe_ctrl_seg *cseg) |
| 90 | +{ |
| 91 | + struct xsc_core_device *xdev = sq->cq.xdev; |
| 92 | + int send_wqe_ds_num_log; |
| 93 | + u32 val = 0; |
| 94 | + |
| 95 | + send_wqe_ds_num_log = ilog2(xdev->caps.send_ds_num); |
| 96 | + xsc_txwqe_build_cseg_csum(sq, skb, cseg); |
| 97 | + |
| 98 | + if (mss != 0) { |
| 99 | + val |= XSC_WQE_CTRL_SEG_HAS_PPH | |
| 100 | + XSC_WQE_CTRL_SEG_SO_TYPE | |
| 101 | + FIELD_PREP(XSC_WQE_CTRL_SEG_SO_HDR_LEN_MASK, ihs) | |
| 102 | + FIELD_PREP(XSC_WQE_CTRL_SEG_SO_DATA_SIZE_MASK, mss); |
| 103 | + cseg->data2 = cpu_to_le32(val); |
| 104 | + } |
| 105 | + |
| 106 | + val = le32_to_cpu(cseg->data0); |
| 107 | + val |= FIELD_PREP(XSC_WQE_CTRL_SEG_MSG_OPCODE_MASK, opcode) | |
| 108 | + FIELD_PREP(XSC_WQE_CTRL_SEG_WQE_ID_MASK, |
| 109 | + sq->pc << send_wqe_ds_num_log) | |
| 110 | + FIELD_PREP(XSC_WQE_CTRL_SEG_DS_DATA_NUM_MASK, |
| 111 | + ds_cnt - XSC_SEND_WQEBB_CTRL_NUM_DS); |
| 112 | + cseg->data0 = cpu_to_le32(val); |
| 113 | + cseg->msg_len = cpu_to_le32(msglen); |
| 114 | + cseg->data3 = cpu_to_le32(XSC_WQE_CTRL_SEG_CE); |
| 115 | +} |
| 116 | + |
| 117 | +static int xsc_txwqe_build_dsegs(struct xsc_sq *sq, struct sk_buff *skb, |
| 118 | + u16 ihs, u16 headlen, |
| 119 | + struct xsc_wqe_data_seg *dseg) |
| 120 | +{ |
| 121 | + struct xsc_adapter *adapter = sq->channel->adapter; |
| 122 | + struct device *dev = adapter->dev; |
| 123 | + dma_addr_t dma_addr = 0; |
| 124 | + u8 num_dma = 0; |
| 125 | + int i; |
| 126 | + |
| 127 | + if (headlen) { |
| 128 | + dma_addr = dma_map_single(dev, |
| 129 | + skb->data, |
| 130 | + headlen, |
| 131 | + DMA_TO_DEVICE); |
| 132 | + if (unlikely(dma_mapping_error(dev, dma_addr))) |
| 133 | + goto err_dma_unmap_wqe; |
| 134 | + |
| 135 | + dseg->va = cpu_to_le64(dma_addr); |
| 136 | + dseg->mkey = cpu_to_le32(be32_to_cpu(sq->mkey_be)); |
| 137 | + dseg->data0 |= |
| 138 | + cpu_to_le32(FIELD_PREP(XSC_WQE_DATA_SEG_SEG_LEN_MASK, |
| 139 | + headlen)); |
| 140 | + |
| 141 | + xsc_dma_push(sq, dma_addr, headlen, XSC_DMA_MAP_SINGLE); |
| 142 | + num_dma++; |
| 143 | + dseg++; |
| 144 | + } |
| 145 | + |
| 146 | + for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
| 147 | + skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
| 148 | + int fsz = skb_frag_size(frag); |
| 149 | + |
| 150 | + dma_addr = skb_frag_dma_map(dev, frag, 0, fsz, DMA_TO_DEVICE); |
| 151 | + if (unlikely(dma_mapping_error(dev, dma_addr))) |
| 152 | + goto err_dma_unmap_wqe; |
| 153 | + |
| 154 | + dseg->va = cpu_to_le64(dma_addr); |
| 155 | + dseg->mkey = cpu_to_le32(be32_to_cpu(sq->mkey_be)); |
| 156 | + dseg->data0 |= |
| 157 | + cpu_to_le32(FIELD_PREP(XSC_WQE_DATA_SEG_SEG_LEN_MASK, |
| 158 | + fsz)); |
| 159 | + |
| 160 | + xsc_dma_push(sq, dma_addr, fsz, XSC_DMA_MAP_PAGE); |
| 161 | + num_dma++; |
| 162 | + dseg++; |
| 163 | + } |
| 164 | + |
| 165 | + return num_dma; |
| 166 | + |
| 167 | +err_dma_unmap_wqe: |
| 168 | + xsc_dma_unmap_wqe(sq, num_dma); |
| 169 | + return -ENOMEM; |
| 170 | +} |
| 171 | + |
| 172 | +static void xsc_sq_notify_hw(struct xsc_wq_cyc *wq, u16 pc, |
| 173 | + struct xsc_sq *sq) |
| 174 | +{ |
| 175 | + struct xsc_adapter *adapter = sq->channel->adapter; |
| 176 | + struct xsc_core_device *xdev = adapter->xdev; |
| 177 | + union xsc_send_doorbell doorbell_value; |
| 178 | + int send_ds_num_log; |
| 179 | + |
| 180 | + send_ds_num_log = ilog2(xdev->caps.send_ds_num); |
| 181 | + /*reverse wqe index to ds index*/ |
| 182 | + doorbell_value.next_pid = pc << send_ds_num_log; |
| 183 | + doorbell_value.qp_num = sq->sqn; |
| 184 | + |
| 185 | + /* Make sure that descriptors are written before |
| 186 | + * updating doorbell record and ringing the doorbell |
| 187 | + */ |
| 188 | + wmb(); |
| 189 | + writel(doorbell_value.send_data, XSC_REG_ADDR(xdev, xdev->regs.tx_db)); |
| 190 | +} |
| 191 | + |
| 192 | +static void xsc_txwqe_complete(struct xsc_sq *sq, struct sk_buff *skb, |
| 193 | + u8 opcode, u16 ds_cnt, |
| 194 | + u8 num_wqebbs, u32 num_bytes, u8 num_dma, |
| 195 | + struct xsc_tx_wqe_info *wi) |
| 196 | +{ |
| 197 | + struct xsc_wq_cyc *wq = &sq->wq; |
| 198 | + |
| 199 | + wi->num_bytes = num_bytes; |
| 200 | + wi->num_dma = num_dma; |
| 201 | + wi->num_wqebbs = num_wqebbs; |
| 202 | + wi->skb = skb; |
| 203 | + |
| 204 | + netdev_tx_sent_queue(sq->txq, num_bytes); |
| 205 | + |
| 206 | + if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) |
| 207 | + skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; |
| 208 | + |
| 209 | + sq->pc += wi->num_wqebbs; |
| 210 | + |
| 211 | + if (unlikely(!xsc_wqc_has_room_for(wq, sq->cc, sq->pc, sq->stop_room))) |
| 212 | + netif_tx_stop_queue(sq->txq); |
| 213 | + |
| 214 | + if (!netdev_xmit_more() || netif_xmit_stopped(sq->txq)) |
| 215 | + xsc_sq_notify_hw(wq, sq->pc, sq); |
| 216 | +} |
| 217 | + |
| 218 | +static uint32_t xsc_eth_xmit_frame(struct sk_buff *skb, |
| 219 | + struct xsc_sq *sq, |
| 220 | + struct xsc_tx_wqe *wqe, |
| 221 | + u16 pi) |
| 222 | +{ |
| 223 | + struct xsc_core_device *xdev = sq->cq.xdev; |
| 224 | + struct xsc_send_wqe_ctrl_seg *cseg; |
| 225 | + struct xsc_wqe_data_seg *dseg; |
| 226 | + struct xsc_tx_wqe_info *wi; |
| 227 | + u16 mss, ihs, headlen; |
| 228 | + u32 num_bytes; |
| 229 | + u8 num_wqebbs; |
| 230 | + int num_dma; |
| 231 | + u16 ds_cnt; |
| 232 | + u8 opcode; |
| 233 | + |
| 234 | +retry_send: |
| 235 | + /* Calc ihs and ds cnt, no writes to wqe yet |
| 236 | + * ctrl-ds, it would be reduce in ds_data_num */ |
| 237 | + ds_cnt = XSC_SEND_WQEBB_CTRL_NUM_DS; |
| 238 | + |
| 239 | + if (skb_is_gso(skb)) { |
| 240 | + opcode = XSC_OPCODE_RAW; |
| 241 | + mss = skb_shinfo(skb)->gso_size; |
| 242 | + ihs = xsc_tx_get_gso_ihs(sq, skb); |
| 243 | + num_bytes = skb->len + |
| 244 | + (skb_shinfo(skb)->gso_segs - 1) * ihs; |
| 245 | + } else { |
| 246 | + opcode = XSC_OPCODE_RAW; |
| 247 | + mss = 0; |
| 248 | + ihs = 0; |
| 249 | + num_bytes = skb->len; |
| 250 | + } |
| 251 | + |
| 252 | + /*linear data in skb*/ |
| 253 | + headlen = skb->len - skb->data_len; |
| 254 | + ds_cnt += !!headlen; |
| 255 | + ds_cnt += skb_shinfo(skb)->nr_frags; |
| 256 | + |
| 257 | + /* Check packet size. */ |
| 258 | + if (unlikely(mss == 0 && skb->len > sq->hw_mtu)) |
| 259 | + goto err_drop; |
| 260 | + |
| 261 | + num_wqebbs = DIV_ROUND_UP(ds_cnt, xdev->caps.send_ds_num); |
| 262 | + /*if ds_cnt exceed one wqe, drop it*/ |
| 263 | + if (num_wqebbs != 1) { |
| 264 | + if (skb_linearize(skb)) |
| 265 | + goto err_drop; |
| 266 | + goto retry_send; |
| 267 | + } |
| 268 | + |
| 269 | + /* fill wqe */ |
| 270 | + wi = (struct xsc_tx_wqe_info *)&sq->db.wqe_info[pi]; |
| 271 | + cseg = &wqe->ctrl; |
| 272 | + dseg = &wqe->data[0]; |
| 273 | + |
| 274 | + if (unlikely(skb->len == 0)) |
| 275 | + goto err_drop; |
| 276 | + |
| 277 | + xsc_txwqe_build_csegs(sq, skb, mss, ihs, headlen, |
| 278 | + opcode, ds_cnt, skb->len, cseg); |
| 279 | + |
| 280 | + /*inline header is also use dma to transport*/ |
| 281 | + num_dma = xsc_txwqe_build_dsegs(sq, skb, ihs, headlen, dseg); |
| 282 | + if (unlikely(num_dma < 0)) |
| 283 | + goto err_drop; |
| 284 | + |
| 285 | + xsc_txwqe_complete(sq, skb, opcode, ds_cnt, num_wqebbs, num_bytes, |
| 286 | + num_dma, wi); |
| 287 | + |
| 288 | + return NETDEV_TX_OK; |
| 289 | + |
| 290 | +err_drop: |
| 291 | + dev_kfree_skb_any(skb); |
| 292 | + |
| 293 | + return NETDEV_TX_OK; |
| 294 | +} |
| 295 | + |
| 296 | +netdev_tx_t xsc_eth_xmit_start(struct sk_buff *skb, struct net_device *netdev) |
| 297 | +{ |
| 298 | + struct xsc_adapter *adapter = netdev_priv(netdev); |
| 299 | + struct xsc_tx_wqe *wqe; |
| 300 | + struct xsc_sq *sq; |
| 301 | + u32 ds_num; |
| 302 | + u16 pi; |
| 303 | + |
| 304 | + if (adapter->status != XSCALE_ETH_DRIVER_OK) |
| 305 | + return NETDEV_TX_BUSY; |
| 306 | + |
| 307 | + sq = adapter->txq2sq[skb_get_queue_mapping(skb)]; |
| 308 | + if (unlikely(!sq)) |
| 309 | + return NETDEV_TX_BUSY; |
| 310 | + |
| 311 | + ds_num = adapter->xdev->caps.send_ds_num; |
| 312 | + wqe = xsc_sq_fetch_wqe(sq, ds_num * XSC_SEND_WQE_DS, &pi); |
| 313 | + |
| 314 | + return xsc_eth_xmit_frame(skb, sq, wqe, pi); |
| 315 | +} |
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