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octeontx2-pf: offload DMAC filters to CGX/RPM block
DMAC filtering can be achieved by either NPC MCAM rules or CGX/RPM MAC filters. Currently we are achieving this by NPC MCAM rules. This patch offloads DMAC filters to CGX/RPM MAC filters instead of NPC MCAM rules. Offloading DMAC filter to CGX/RPM block helps in reducing traffic to NPC block and save MCAM rules Signed-off-by: Hariprasad Kelam <hkelam@marvell.com> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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173 changes: 173 additions & 0 deletions
173
drivers/net/ethernet/marvell/octeontx2/nic/otx2_dmac_flt.c
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,173 @@ | ||
| // SPDX-License-Identifier: GPL-2.0 | ||
| /* Marvell OcteonTx2 RVU Physcial Function ethernet driver | ||
| * | ||
| * Copyright (C) 2021 Marvell. | ||
| */ | ||
|
|
||
| #include "otx2_common.h" | ||
|
|
||
| static int otx2_dmacflt_do_add(struct otx2_nic *pf, const u8 *mac, | ||
| u8 *dmac_index) | ||
| { | ||
| struct cgx_mac_addr_add_req *req; | ||
| struct cgx_mac_addr_add_rsp *rsp; | ||
| int err; | ||
|
|
||
| mutex_lock(&pf->mbox.lock); | ||
|
|
||
| req = otx2_mbox_alloc_msg_cgx_mac_addr_add(&pf->mbox); | ||
| if (!req) { | ||
| mutex_unlock(&pf->mbox.lock); | ||
| return -ENOMEM; | ||
| } | ||
|
|
||
| ether_addr_copy(req->mac_addr, mac); | ||
| err = otx2_sync_mbox_msg(&pf->mbox); | ||
|
|
||
| if (!err) { | ||
| rsp = (struct cgx_mac_addr_add_rsp *) | ||
| otx2_mbox_get_rsp(&pf->mbox.mbox, 0, &req->hdr); | ||
| *dmac_index = rsp->index; | ||
| } | ||
|
|
||
| mutex_unlock(&pf->mbox.lock); | ||
| return err; | ||
| } | ||
|
|
||
| static int otx2_dmacflt_add_pfmac(struct otx2_nic *pf) | ||
| { | ||
| struct cgx_mac_addr_set_or_get *req; | ||
| int err; | ||
|
|
||
| mutex_lock(&pf->mbox.lock); | ||
|
|
||
| req = otx2_mbox_alloc_msg_cgx_mac_addr_set(&pf->mbox); | ||
| if (!req) { | ||
| mutex_unlock(&pf->mbox.lock); | ||
| return -ENOMEM; | ||
| } | ||
|
|
||
| ether_addr_copy(req->mac_addr, pf->netdev->dev_addr); | ||
| err = otx2_sync_mbox_msg(&pf->mbox); | ||
|
|
||
| mutex_unlock(&pf->mbox.lock); | ||
| return err; | ||
| } | ||
|
|
||
| int otx2_dmacflt_add(struct otx2_nic *pf, const u8 *mac, u8 bit_pos) | ||
| { | ||
| u8 *dmacindex; | ||
|
|
||
| /* Store dmacindex returned by CGX/RPM driver which will | ||
| * be used for macaddr update/remove | ||
| */ | ||
| dmacindex = &pf->flow_cfg->bmap_to_dmacindex[bit_pos]; | ||
|
|
||
| if (ether_addr_equal(mac, pf->netdev->dev_addr)) | ||
| return otx2_dmacflt_add_pfmac(pf); | ||
| else | ||
| return otx2_dmacflt_do_add(pf, mac, dmacindex); | ||
| } | ||
|
|
||
| static int otx2_dmacflt_do_remove(struct otx2_nic *pfvf, const u8 *mac, | ||
| u8 dmac_index) | ||
| { | ||
| struct cgx_mac_addr_del_req *req; | ||
| int err; | ||
|
|
||
| mutex_lock(&pfvf->mbox.lock); | ||
| req = otx2_mbox_alloc_msg_cgx_mac_addr_del(&pfvf->mbox); | ||
| if (!req) { | ||
| mutex_unlock(&pfvf->mbox.lock); | ||
| return -ENOMEM; | ||
| } | ||
|
|
||
| req->index = dmac_index; | ||
|
|
||
| err = otx2_sync_mbox_msg(&pfvf->mbox); | ||
| mutex_unlock(&pfvf->mbox.lock); | ||
|
|
||
| return err; | ||
| } | ||
|
|
||
| static int otx2_dmacflt_remove_pfmac(struct otx2_nic *pf) | ||
| { | ||
| struct msg_req *req; | ||
| int err; | ||
|
|
||
| mutex_lock(&pf->mbox.lock); | ||
| req = otx2_mbox_alloc_msg_cgx_mac_addr_reset(&pf->mbox); | ||
| if (!req) { | ||
| mutex_unlock(&pf->mbox.lock); | ||
| return -ENOMEM; | ||
| } | ||
|
|
||
| err = otx2_sync_mbox_msg(&pf->mbox); | ||
|
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||
| mutex_unlock(&pf->mbox.lock); | ||
| return err; | ||
| } | ||
|
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||
| int otx2_dmacflt_remove(struct otx2_nic *pf, const u8 *mac, | ||
| u8 bit_pos) | ||
| { | ||
| u8 dmacindex = pf->flow_cfg->bmap_to_dmacindex[bit_pos]; | ||
|
|
||
| if (ether_addr_equal(mac, pf->netdev->dev_addr)) | ||
| return otx2_dmacflt_remove_pfmac(pf); | ||
| else | ||
| return otx2_dmacflt_do_remove(pf, mac, dmacindex); | ||
| } | ||
|
|
||
| /* CGX/RPM blocks support max unicast entries of 32. | ||
| * on typical configuration MAC block associated | ||
| * with 4 lmacs, each lmac will have 8 dmac entries | ||
| */ | ||
| int otx2_dmacflt_get_max_cnt(struct otx2_nic *pf) | ||
| { | ||
| struct cgx_max_dmac_entries_get_rsp *rsp; | ||
| struct msg_req *msg; | ||
| int err; | ||
|
|
||
| mutex_lock(&pf->mbox.lock); | ||
| msg = otx2_mbox_alloc_msg_cgx_mac_max_entries_get(&pf->mbox); | ||
|
|
||
| if (!msg) { | ||
| mutex_unlock(&pf->mbox.lock); | ||
| return -ENOMEM; | ||
| } | ||
|
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| err = otx2_sync_mbox_msg(&pf->mbox); | ||
| if (err) | ||
| goto out; | ||
|
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| rsp = (struct cgx_max_dmac_entries_get_rsp *) | ||
| otx2_mbox_get_rsp(&pf->mbox.mbox, 0, &msg->hdr); | ||
| pf->flow_cfg->dmacflt_max_flows = rsp->max_dmac_filters; | ||
|
|
||
| out: | ||
| mutex_unlock(&pf->mbox.lock); | ||
| return err; | ||
| } | ||
|
|
||
| int otx2_dmacflt_update(struct otx2_nic *pf, u8 *mac, u8 bit_pos) | ||
| { | ||
| struct cgx_mac_addr_update_req *req; | ||
| int rc; | ||
|
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| mutex_lock(&pf->mbox.lock); | ||
|
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| req = otx2_mbox_alloc_msg_cgx_mac_addr_update(&pf->mbox); | ||
|
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| if (!req) { | ||
| mutex_unlock(&pf->mbox.lock); | ||
| rc = -ENOMEM; | ||
| } | ||
|
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| ether_addr_copy(req->mac_addr, mac); | ||
| req->index = pf->flow_cfg->bmap_to_dmacindex[bit_pos]; | ||
| rc = otx2_sync_mbox_msg(&pf->mbox); | ||
|
|
||
| mutex_unlock(&pf->mbox.lock); | ||
| return rc; | ||
| } |
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