Change instruction binary to contain the ALU mode

Author: lightcode

asm/asm.py

@@ -4,7 +4,18 @@
 
 progf = sys.argv[1]
 
-inst = ["nop", "lda", "add", "out", "jmp", "hlt", "sub", "jez", "sta", "jnz"]
+inst = {
+    "nop": 0x00,
+    "lda": 0x01,
+    "out": 0x03,
+    "jmp": 0x04,
+    "hlt": 0x05,
+    "jez": 0x07,
+    "sta": 0x08,
+    "jnz": 0x09,
+    "add": 0xa0,
+    "sub": 0xa1,
+}
 
 PROGRAM, DATA = 0, 1
 MEM_SIZE = 256
@@ -35,7 +46,7 @@
                 if kw[0][-1] == ":":
                     labels[kw[0].rstrip(":")] = cnt
                 else:
-                    mem[cnt] = inst.index(kw[0])
+                    mem[cnt] = inst[kw[0]]
                     cnt += 1
                     for a in kw[1:]:
                         mem[cnt] = a

gtkwave/config.gtkw

@@ -1,15 +1,15 @@
 [*]
 [*] GTKWave Analyzer v3.3.66 (w)1999-2015 BSI
-[*] Wed Aug 30 06:16:21 2017
+[*] Thu Aug 31 05:57:26 2017
 [*]
 [dumpfile] "machine.vcd"
-[dumpfile_mtime] "Wed Aug 30 05:25:30 2017"
-[dumpfile_size] 52264
-[savefile] "config.gtkw"
-[timestart] 0
+[dumpfile_mtime] "Wed Aug 30 17:33:50 2017"
+[dumpfile_size] 53507
+[savefile] "gtkwave/config.gtkw"
+[timestart] 1102
 [size] 1916 1042
 [pos] -960 39
-*-3.000000 30 170 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+*-3.000000 1120 170 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
 [treeopen] machine_tb.
 [treeopen] machine_tb.m_machine.
 [sst_width] 223
@@ -30,12 +30,9 @@ machine_tb.m_machine.m_cpu.internal_clk
 @28
 machine_tb.m_machine.m_cpu.reset
 @2022
-^2 gtkwave/states.txt
+^1 gtkwave/states.txt
 machine_tb.m_machine.m_cpu.state[3:0]
-@28
-machine_tb.m_machine.m_cpu.cycle_clk
-@2022
-^1 gtkwave/opcode.txt
+^2 gtkwave/opcode.txt
 machine_tb.m_machine.m_cpu.opcode[7:0]
 @1000200
 -Control

gtkwave/opcode.txt

@@ -1,10 +1,10 @@
 00 NOP
 01 LDA
-02 ADD
 03 OUT
 04 JMP
 05 HLT
-06 SUB
 07 JEZ
 08 STA
 09 JNZ
+A0 ADD
+A1 SUB

rtl/cpu.v

@@ -150,9 +150,7 @@ module cpu(
   assign jump_allowed = opcode == `OP_JMP | (opcode == `OP_JEZ & eq_zero) | (opcode == `OP_JNZ & !eq_zero);
 
   assign c_next = state == `STATE_NEXT | reset;
-  assign alu_mode = (opcode == `OP_SUB) ? `ALU_SUB :
-                    (opcode == `OP_ADD) ? `ALU_ADD :
-                    'bx;
+  assign alu_mode = (state == `STATE_ALU_OP) ? opcode[3:0] : 'bx;
 
   assign c_ai   = state == `STATE_RAM_A | state == `STATE_ALU_OP;
   assign c_ao   = state == `STATE_OUT_A | state == `STATE_STORE_A;

rtl/parameters.v

@@ -1,13 +1,13 @@
 `define OP_NOP 8'h00
 `define OP_LDA 8'h01
-`define OP_ADD 8'h02
 `define OP_OUT 8'h03
 `define OP_JMP 8'h04
 `define OP_HLT 8'h05
-`define OP_SUB 8'h06
 `define OP_JEZ 8'h07
 `define OP_STA 8'h08
 `define OP_JNZ 8'h09
+`define OP_ADD 8'ha0
+`define OP_SUB 8'ha1
 
 `define STATE_NEXT             4'h0
 `define STATE_FETCH_PC         4'h1