Skip to content

Commit db85427

Browse files
dpgeorgedpgeorge
committed
stm32/boards/PYBD_SF6: Support boards with larger SPI flash.
There are some newer PYBD_SF6 being produced which have a larger flash, namely two of 8MiB (instead of the older ones with two of 2MiB). This commit adds support for these boards. The idea is to have the same PYBD_SF6 firmware run on both old and new boards. That means autodetecting the flash at start-up and configuring all the relevant SPI/QSPI parameters, including for ROMFS and mboot. Signed-off-by: Damien George <damien@micropython.org>
1 parent ed4833d commit db85427

File tree

3 files changed

+139
-2
lines changed

3 files changed

+139
-2
lines changed

‎ports/stm32/boards/PYBD_SF6/board_init.c

Lines changed: 88 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1 +1,89 @@
1+
/*
2+
* This file is part of the MicroPython project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2025 Damien P. George
7+
*
8+
* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
15+
* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
18+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
26+
27+
#include <stdbool.h>
28+
#include "boardctrl.h"
29+
#include "qspi.h"
30+
31+
#if BUILDING_MBOOT
32+
#include "mboot/mboot.h"
33+
#endif
34+
35+
// Use PYBD_SF2 as base configuration.
136
#include "boards/PYBD_SF2/board_init.c"
37+
38+
// Adesto AT25SF161 16-MBit.
39+
static const mp_spiflash_chip_params_t chip_params_at25sf161 = {
40+
.jedec_id = 0x01861f,
41+
.memory_size_bytes_log2 = 21,
42+
.qspi_prescaler = 3, // maximum frequency 104MHz
43+
.qread_num_dummy = 2,
44+
};
45+
46+
// Infineon S25FL064 64-MBit.
47+
static const mp_spiflash_chip_params_t chip_params_s25fl064 = {
48+
.jedec_id = 0x176001,
49+
.memory_size_bytes_log2 = 23,
50+
.qspi_prescaler = 2, // maximum frequency 108MHz
51+
.qread_num_dummy = 4,
52+
};
53+
54+
// Selection of possible SPI flash chips.
55+
static const mp_spiflash_chip_params_t *const chip_params_table[] = {
56+
&chip_params_at25sf161,
57+
&chip_params_s25fl064,
58+
};
59+
60+
void board_early_init_sf6(void) {
61+
// Initialise default SPI flash parameters.
62+
MICROPY_BOARD_SPIFLASH_CHIP_PARAMS0 = &chip_params_at25sf161;
63+
MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1 = &chip_params_at25sf161;
64+
65+
// Continue with standard board early init.
66+
board_early_init();
67+
}
68+
69+
int mp_spiflash_detect(mp_spiflash_t *spiflash, int ret, uint32_t devid) {
70+
if (ret != 0) {
71+
// Could not identify flash. Succeed anyway using default chip parameters.
72+
return 0;
73+
}
74+
75+
// Try to detect the SPI flash based on the JEDEC id.
76+
for (size_t i = 0; i < MP_ARRAY_SIZE(chip_params_table); ++i) {
77+
if (devid == chip_params_table[i]->jedec_id) {
78+
spiflash->chip_params = chip_params_table[i];
79+
if (spiflash->config->bus_kind == MP_SPIFLASH_BUS_QSPI) {
80+
// Reinitialise the QSPI but to set new size, prescaler and dummy bytes.
81+
uint8_t num_dummy = spiflash->chip_params->qread_num_dummy;
82+
spiflash->config->bus.u_qspi.proto->ioctl(spiflash->config->bus.u_qspi.data, MP_QSPI_IOCTL_INIT, num_dummy);
83+
}
84+
break;
85+
}
86+
}
87+
88+
return 0;
89+
}

‎ports/stm32/boards/PYBD_SF6/f767.ld

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@ MEMORY
1818
{
1919
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
2020
FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 2016K /* sectors 1-11 3x32K 1*128K 7*256K */
21-
FLASH_ROMFS (rx): ORIGIN = 0x90000000, LENGTH = 2048K /* external QSPI */
21+
FLASH_ROMFS (rx): ORIGIN = 0x90000000, LENGTH = 2048K /* external QSPI, at least 2MiB */
2222
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 512K /* DTCM=128k, SRAM1=368K, SRAM2=16K */
2323
}
2424

@@ -39,6 +39,5 @@ _heap_end = _sstack;
3939

4040
/* ROMFS location */
4141
_micropy_hw_romfs_part0_start = ORIGIN(FLASH_ROMFS);
42-
_micropy_hw_romfs_part0_size = LENGTH(FLASH_ROMFS);
4342

4443
INCLUDE common_bl.ld

‎ports/stm32/boards/PYBD_SF6/mpconfigboard.h

Lines changed: 50 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -69,3 +69,53 @@
6969
#define MICROPY_HW_ETH_RMII_TX_EN (pyb_pin_W8)
7070
#define MICROPY_HW_ETH_RMII_TXD0 (pyb_pin_W45)
7171
#define MICROPY_HW_ETH_RMII_TXD1 (pyb_pin_W49)
72+
73+
// The below code reconfigures SPI flash for dynamic size detection.
74+
75+
#undef MICROPY_BOARD_EARLY_INIT
76+
#undef MICROPY_HW_SPIFLASH_SIZE_BITS
77+
#undef MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2
78+
#undef MBOOT_SPIFLASH_BYTE_SIZE
79+
#undef MBOOT_SPIFLASH_LAYOUT
80+
#undef MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE
81+
#undef MBOOT_SPIFLASH2_BYTE_SIZE
82+
#undef MBOOT_SPIFLASH2_LAYOUT
83+
#undef MBOOT_SPIFLASH2_ERASE_BLOCKS_PER_PAGE
84+
85+
// These are convenience macros to refer to the SPI flash chip parameters for the external SPI flash.
86+
#define MICROPY_BOARD_SPIFLASH_CHIP_PARAMS0 (spi_bdev.spiflash.chip_params) // SPI flash #1, R/W storage
87+
#define MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1 (spi_bdev2.spiflash.chip_params) // SPI flash #2, memory mapped
88+
89+
// Early init is needed to initialise the default SPI flash chip parameters.
90+
#define MICROPY_BOARD_EARLY_INIT board_early_init_sf6
91+
92+
// Enable dynamic detection of SPI flash.
93+
#define MICROPY_HW_SPIFLASH_CHIP_PARAMS (1)
94+
#define MICROPY_HW_SPIFLASH_DETECT_DEVICE (1)
95+
96+
// Settings for SPI flash #1.
97+
#define MICROPY_HW_SPIFLASH_SIZE_BITS (1 << (MICROPY_BOARD_SPIFLASH_CHIP_PARAMS0->memory_size_bytes_log2 + 3))
98+
99+
// Settings for SPI flash #2.
100+
#define MICROPY_HW_QSPI_PRESCALER (MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1->qspi_prescaler)
101+
#define MICROPY_HW_QSPIFLASH_SIZE_BITS_LOG2 (MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1->memory_size_bytes_log2 + 3)
102+
103+
// ROMFS partition 0 is dynamically sized (SPI flash #2).
104+
#define MICROPY_HW_ROMFS_PART0_START (uintptr_t)(&_micropy_hw_romfs_part0_start)
105+
#define MICROPY_HW_ROMFS_PART0_SIZE (1 << MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1->memory_size_bytes_log2)
106+
107+
// Mboot SPI flash #1 configuration.
108+
#define MBOOT_SPIFLASH_LAYOUT_DYNAMIC_MAX_LEN (20)
109+
#define MBOOT_SPIFLASH_LAYOUT (MICROPY_BOARD_SPIFLASH_CHIP_PARAMS0->memory_size_bytes_log2 == 21 ? "/0x80000000/512*4Kg" : "/0x80000000/2048*4Kg")
110+
#define MBOOT_SPIFLASH_BYTE_SIZE (1 << MICROPY_BOARD_SPIFLASH_CHIP_PARAMS0->memory_size_bytes_log2)
111+
#define MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE (1)
112+
113+
// Mboot SPI flash #2 configuration.
114+
#define MBOOT_SPIFLASH2_LAYOUT_DYNAMIC_MAX_LEN (20)
115+
#define MBOOT_SPIFLASH2_LAYOUT (MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1->memory_size_bytes_log2 == 21 ? "/0x90000000/512*4Kg" : "/0x90000000/2048*4Kg")
116+
#define MBOOT_SPIFLASH2_BYTE_SIZE (1 << MICROPY_BOARD_SPIFLASH_CHIP_PARAMS1->memory_size_bytes_log2)
117+
#define MBOOT_SPIFLASH2_ERASE_BLOCKS_PER_PAGE (1)
118+
119+
extern unsigned char _micropy_hw_romfs_part0_start;
120+
121+
void board_early_init_sf6(void);

0 commit comments

Comments
 (0)