From 3379a0ac39b2f18376432080dd61c88c5977198e Mon Sep 17 00:00:00 2001
From: jnosek <jnosek@gmail.com>
Date: Tue, 29 Jul 2014 13:28:02 -0400
Subject: [PATCH] Major refactoring for 16 bit registers

Allows overflow correction, sign extending, and overlapping custom
register actions with the memory map
---
 AGC.dev/Program.cs                    |   4 +-
 AGC/AGC.csproj                        |  14 ++-
 AGC/Base/ErasableMemory.cs            |  56 +++++++++++
 AGC/Base/FixedMemory.cs               |  37 +++++++
 AGC/Base/IRegister.cs                 |  12 +++
 AGC/Base/IWord.cs                     |  16 +++
 AGC/Base/MemoryAddress.cs             |  13 ++-
 AGC/Base/Register.cs                  |  38 -------
 AGC/Base/Word.cs                      |  34 +++++++
 AGC/ExtraCodeInstructionSet.cs        |   3 +-
 AGC/Instructions/AddToStorage.cs      |   2 +-
 AGC/Instructions/Augment.cs           |  13 ++-
 AGC/Instructions/BranchZeroToFixed.cs |  29 ++++++
 AGC/Instructions/ExtraQuarterCode.cs  |  36 +++++++
 AGC/Instructions/TransferControl.cs   |   2 +-
 AGC/MemoryMap.cs                      |  45 ++++++---
 AGC/Processor.cs                      | 138 +++++++++++++-------------
 AGC/Registers/Accumulator.cs          |  16 +++
 AGC/Registers/FullRegister.cs         |  55 ++++++++++
 AGC/Registers/ProgramCounter.cs       |  59 +++++++++++
 AGC/Registers/Register.cs             |  16 +++
 21 files changed, 507 insertions(+), 131 deletions(-)
 create mode 100644 AGC/Base/ErasableMemory.cs
 create mode 100644 AGC/Base/FixedMemory.cs
 create mode 100644 AGC/Base/IRegister.cs
 create mode 100644 AGC/Base/IWord.cs
 delete mode 100644 AGC/Base/Register.cs
 create mode 100644 AGC/Base/Word.cs
 create mode 100644 AGC/Instructions/BranchZeroToFixed.cs
 create mode 100644 AGC/Instructions/ExtraQuarterCode.cs
 create mode 100644 AGC/Registers/Accumulator.cs
 create mode 100644 AGC/Registers/FullRegister.cs
 create mode 100644 AGC/Registers/ProgramCounter.cs
 create mode 100644 AGC/Registers/Register.cs

diff --git a/AGC.dev/Program.cs b/AGC.dev/Program.cs
index 1c22c01..a3d838f 100644
--- a/AGC.dev/Program.cs
+++ b/AGC.dev/Program.cs
@@ -13,8 +13,8 @@ static void Main(string[] args)
         {
             var computer = new Computer();
 
-            computer.Memory.GetAddress(0x300).Write(0x6301);
-            computer.Memory.GetAddress(0x301).Write(0x02);
+            computer.Memory.GetWord(0x300).Write(0x6301);
+            computer.Memory.GetWord(0x301).Write(0x02);
             computer.CPU.Z.Write(0x300);
             computer.CPU.Execute();
 
diff --git a/AGC/AGC.csproj b/AGC/AGC.csproj
index a53d221..907bb7c 100644
--- a/AGC/AGC.csproj
+++ b/AGC/AGC.csproj
@@ -37,9 +37,14 @@
     <!-- A reference to the entire .NET Framework is automatically included -->
   </ItemGroup>
   <ItemGroup>
-    <Compile Include="Base\MemoryBank.cs" />
+    <Compile Include="Base\FixedMemory.cs" />
+    <Compile Include="Base\IRegister.cs" />
+    <Compile Include="Base\Word.cs" />
+    <Compile Include="Registers\FullRegister.cs" />
+    <Compile Include="Base\IWord.cs" />
     <Compile Include="Base\MemoryAddress.cs" />
-    <Compile Include="Base\Register.cs" />
+    <Compile Include="Base\MemoryBank.cs" />
+    <Compile Include="Base\ErasableMemory.cs" />
     <Compile Include="Base\Computer.cs" />
     <Compile Include="ExtraCodeInstructionSet.cs" />
     <Compile Include="InstructionSet.cs" />
@@ -48,11 +53,16 @@
     <Compile Include="Base\IInstruction.cs" />
     <Compile Include="Base\InstructionList.cs" />
     <Compile Include="Instructions\Augment.cs" />
+    <Compile Include="Instructions\BranchZeroToFixed.cs" />
+    <Compile Include="Instructions\ExtraQuarterCode.cs" />
     <Compile Include="Instructions\QuarterCode.cs" />
     <Compile Include="Instructions\TransferControl.cs" />
     <Compile Include="MemoryMap.cs" />
     <Compile Include="Processor.cs" />
     <Compile Include="Properties\AssemblyInfo.cs" />
+    <Compile Include="Registers\Accumulator.cs" />
+    <Compile Include="Registers\ProgramCounter.cs" />
+    <Compile Include="Registers\Register.cs" />
   </ItemGroup>
   <Import Project="$(MSBuildExtensionsPath32)\Microsoft\Portable\$(TargetFrameworkVersion)\Microsoft.Portable.CSharp.targets" />
   <!-- To modify your build process, add your task inside one of the targets below and uncomment it. 
diff --git a/AGC/Base/ErasableMemory.cs b/AGC/Base/ErasableMemory.cs
new file mode 100644
index 0000000..fc89fad
--- /dev/null
+++ b/AGC/Base/ErasableMemory.cs
@@ -0,0 +1,56 @@
+using System;
+using System.Collections.Generic;
+using System.Linq;
+using System.Text;
+
+namespace Apollo.Virtual.AGC.Base
+{
+    class ErasableMemory : IWord
+    {
+        protected MemoryAddress memory;
+
+        public ErasableMemory()
+        {
+        }
+
+        public ErasableMemory(MemoryAddress memory)
+        {
+            this.memory = memory;
+        }
+
+        public void Write(IWord word)
+        {
+            // if 16-bit, apply overflow correction and write 15-bit value
+            if (word.Is16Bit)
+            {
+                uint value = word.Read();
+
+                // get lower 14 bits
+                uint lowerBits = value & 0x3FFF;
+
+                // move 16-th bit, into 15th position, isolate it, and set it in above value;
+                value = (value >> 1 & 0x4000) | lowerBits;
+
+                memory.Write((ushort)value);
+            }
+            else
+                memory.Write(word.Read());
+        }
+
+        public bool Is16Bit
+        {
+            get { return false; }
+        }
+
+
+        public ushort Address
+        {
+            get { return memory.Address; }
+        }
+
+        public ushort Read()
+        {
+            return memory.Read();
+        }
+    }
+}
diff --git a/AGC/Base/FixedMemory.cs b/AGC/Base/FixedMemory.cs
new file mode 100644
index 0000000..a48fdbc
--- /dev/null
+++ b/AGC/Base/FixedMemory.cs
@@ -0,0 +1,37 @@
+using System;
+using System.Collections.Generic;
+using System.Linq;
+using System.Text;
+
+namespace Apollo.Virtual.AGC.Base
+{
+    class FixedMemory : IWord
+    {
+        private MemoryAddress memory;
+
+        public FixedMemory(MemoryAddress memory)
+        {
+            this.memory = memory;
+        }
+
+        public bool Is16Bit
+        {
+            get { return false; }
+        }
+
+        public void Write(IWord word)
+        {
+            throw new InvalidOperationException("Cannot write to a fixed memory location");
+        }
+
+        public ushort Address
+        {
+            get { return memory.Address; }
+        }
+
+        public ushort Read()
+        {
+            return memory.Read();
+        }
+    }
+}
diff --git a/AGC/Base/IRegister.cs b/AGC/Base/IRegister.cs
new file mode 100644
index 0000000..4f0e8af
--- /dev/null
+++ b/AGC/Base/IRegister.cs
@@ -0,0 +1,12 @@
+using System;
+using System.Collections.Generic;
+using System.Linq;
+using System.Text;
+
+namespace Apollo.Virtual.AGC.Base
+{
+    interface IRegister
+    {
+        MemoryAddress Memory { set; }
+    }
+}
diff --git a/AGC/Base/IWord.cs b/AGC/Base/IWord.cs
new file mode 100644
index 0000000..f3e8718
--- /dev/null
+++ b/AGC/Base/IWord.cs
@@ -0,0 +1,16 @@
+using System;
+using System.Collections.Generic;
+using System.Linq;
+using System.Text;
+
+namespace Apollo.Virtual.AGC.Base
+{
+    public interface IWord
+    {
+        bool Is16Bit { get; }
+        ushort Address { get; }
+
+        ushort Read();
+        void Write(IWord word);
+    }
+}
diff --git a/AGC/Base/MemoryAddress.cs b/AGC/Base/MemoryAddress.cs
index 2ab4a0e..9b34f39 100644
--- a/AGC/Base/MemoryAddress.cs
+++ b/AGC/Base/MemoryAddress.cs
@@ -8,22 +8,25 @@ namespace Apollo.Virtual.AGC.Base
     public class MemoryAddress
     {
         private MemoryBank m;
-        private uint address;
+        private ushort index;
 
-        public MemoryAddress(MemoryBank memory, uint address)
+        public ushort Address { get; private set; }
+
+        public MemoryAddress(MemoryBank memory, ushort address, ushort index)
         {
             this.m = memory;
-            this.address = address;
+            this.index = index;
+            this.Address = address;
         }
 
         public ushort Read()
         {
-            return m[address];
+            return m[index];
         }
 
         public void Write(ushort value)
         {
-            m[address] = value;
+            m[index] = value;
         }
     }
 }
diff --git a/AGC/Base/Register.cs b/AGC/Base/Register.cs
deleted file mode 100644
index 0683215..0000000
--- a/AGC/Base/Register.cs
+++ /dev/null
@@ -1,38 +0,0 @@
-using System;
-using System.Collections.Generic;
-using System.Linq;
-using System.Text;
-
-namespace Apollo.Virtual.AGC.Base
-{
-    /// <summary>
-    /// 16 bit register
-    /// 15 data bits, 1 odd-parity bit
-    /// 
-    /// All registers are memory mapped
-    /// </summary>
-    public class Register
-    {
-        private MemoryAddress address;
-
-        public Register(MemoryAddress address)
-        {
-            this.address = address;
-        }
-
-        public virtual void Write(ushort value)
-        {
-            address.Write(value);
-        }
-
-        public virtual ushort Read()
-        {
-            return address.Read();
-        }
-
-        public void Add(ushort K)
-        {
-            this.Write((ushort)(this.Read() + K));
-        }
-    }
-}
diff --git a/AGC/Base/Word.cs b/AGC/Base/Word.cs
new file mode 100644
index 0000000..1bc0bc7
--- /dev/null
+++ b/AGC/Base/Word.cs
@@ -0,0 +1,34 @@
+using System;
+using System.Collections.Generic;
+using System.Linq;
+using System.Text;
+
+namespace Apollo.Virtual.AGC.Base
+{
+    class Word : IWord
+    {
+        public Word()
+        {
+        }
+
+        public Word(ushort value)
+        {
+            this.Value = value;
+            this.Is16Bit = true;
+        }
+
+        public ushort Value { get; set; }
+        public bool Is16Bit { get; set; }
+        public ushort Address { get;set; }
+
+        public ushort Read()
+        {
+            return Value;
+        }
+
+        public void Write(IWord word)
+        {
+            Value = word.Read();
+        }
+    }
+}
diff --git a/AGC/ExtraCodeInstructionSet.cs b/AGC/ExtraCodeInstructionSet.cs
index 7f2f106..3424c7d 100644
--- a/AGC/ExtraCodeInstructionSet.cs
+++ b/AGC/ExtraCodeInstructionSet.cs
@@ -16,7 +16,8 @@ public ExtraCodeInstructionSet(Processor cpu)
         {
             CPU = cpu;
 
-            Add(new Augment { CPU = CPU });
+            Add(new BranchZeroToFixed { CPU = CPU });
+            Add(new ExtraQuarterCode { CPU = CPU });
         }
 
         public new IInstruction this[ushort code]
diff --git a/AGC/Instructions/AddToStorage.cs b/AGC/Instructions/AddToStorage.cs
index 978622b..0aff741 100644
--- a/AGC/Instructions/AddToStorage.cs
+++ b/AGC/Instructions/AddToStorage.cs
@@ -26,7 +26,7 @@ public void Execute(ushort K)
             var value = CPU.Memory[K];
             CPU.A.Add(value);
 
-            CPU.Memory[K] = CPU.A.Read();
+            CPU.Memory[K].Write(CPU.A);
         }
     }
 }
diff --git a/AGC/Instructions/Augment.cs b/AGC/Instructions/Augment.cs
index 00730cc..5c313fc 100644
--- a/AGC/Instructions/Augment.cs
+++ b/AGC/Instructions/Augment.cs
@@ -6,18 +6,27 @@
 
 namespace Apollo.Virtual.AGC.Instructions
 {
+    /// <summary>
+    /// AUG - EX 0010 10
+    /// </summary>
     class Augment: IInstruction
     {
         public ushort Code
         {
-            get { throw new NotImplementedException(); }
+            get { return 0x02; }
         }
 
         public Processor CPU { get; set; }
 
         public void Execute(ushort K)
         {
-            throw new NotImplementedException();
+            var word = 
+                // if positive, add 1
+                (K & 0x4000) == 0 ? new Word((ushort)(CPU.Memory[K].Read() + 1)) :
+                // else negative, subtract 1
+                new Word((ushort)(CPU.Memory[K].Read() - 1));
+
+            CPU.Memory[K].Write(word);
         }
     }
 }
diff --git a/AGC/Instructions/BranchZeroToFixed.cs b/AGC/Instructions/BranchZeroToFixed.cs
new file mode 100644
index 0000000..73e8787
--- /dev/null
+++ b/AGC/Instructions/BranchZeroToFixed.cs
@@ -0,0 +1,29 @@
+using Apollo.Virtual.AGC.Base;
+using System;
+using System.Collections.Generic;
+using System.Linq;
+using System.Text;
+
+namespace Apollo.Virtual.AGC.Instructions
+{
+    /// <summary>
+    /// BZF - EX 0001
+    /// 
+    /// Jumps to a memory location in the fixed bank if the accumulator is 0
+    /// </summary>
+    class BranchZeroToFixed : IInstruction
+    {
+        public ushort Code
+        {
+            get { return 0x01; }
+        }
+
+        public Processor CPU { get; set; }
+
+        public void Execute(ushort K)
+        {
+            if (CPU.A.Read() == 0)
+                CPU.Z.Write(K);
+        }
+    }
+}
diff --git a/AGC/Instructions/ExtraQuarterCode.cs b/AGC/Instructions/ExtraQuarterCode.cs
new file mode 100644
index 0000000..0a7e67e
--- /dev/null
+++ b/AGC/Instructions/ExtraQuarterCode.cs
@@ -0,0 +1,36 @@
+using Apollo.Virtual.AGC.Base;
+using System;
+using System.Collections.Generic;
+using System.Linq;
+using System.Text;
+
+namespace Apollo.Virtual.AGC.Instructions
+{
+    /// <summary>
+    /// EQC - EX 0010
+    /// 10-bit memroy instructions in the extra code set
+    /// </summary>
+    class ExtraQuarterCode: InstructionList, IInstruction
+    {
+        public ExtraQuarterCode()
+            : base(3)
+        {
+            Add(new Augment { CPU = this.CPU });
+        }
+
+        public ushort Code
+        {
+            get { return 0x02; }
+        }
+
+        public Processor CPU { get; set; }
+
+        public void Execute(ushort K)
+        {
+            var quarterCode = (ushort)(K >> 10);
+            K = (ushort)(K & 0x3FF);
+
+            base[quarterCode].Execute(K);
+        }
+    }
+}
diff --git a/AGC/Instructions/TransferControl.cs b/AGC/Instructions/TransferControl.cs
index 4f2097e..04183a2 100644
--- a/AGC/Instructions/TransferControl.cs
+++ b/AGC/Instructions/TransferControl.cs
@@ -34,7 +34,7 @@ public void Execute(ushort K)
             // else process as a TC command
             {
                 // set Q to the next instruction, for when we return
-                CPU.Q.Write(CPU.Z.Read());
+                CPU.Q.Write(CPU.Z);
 
                 // set control to K
                 CPU.Z.Write(K);
diff --git a/AGC/MemoryMap.cs b/AGC/MemoryMap.cs
index e053084..d0edf58 100644
--- a/AGC/MemoryMap.cs
+++ b/AGC/MemoryMap.cs
@@ -11,6 +11,15 @@ public class MemoryMap
         const uint EB_Address = 0x03;
         const uint FB_Address = 0x04;
 
+        /// <summary>
+        /// Regisers to return at the following addresses
+        /// 
+        /// @0000 - @0061
+        /// 0x0 - 0x31
+        /// 0 - 49
+        /// </summary>
+        private IWord[] registers = new IWord[49];
+
         /// <summary>
         /// Primary RAM
         /// 
@@ -74,26 +83,29 @@ public class MemoryMap
         /// </summary>
         private MemoryBank ioChannels = new MemoryBank(512);
 
-        public ushort this[uint a]
+        public IWord this[ushort a]
         {
             get
             {
-                var address = GetAddress(a);
-                return address.Read();
+                return GetWord(a);
             }
             set
             {
-                var address = GetAddress(a);
-                address.Write(value);
+                GetWord(a).Write(value);
             }
         }
 
-        public MemoryAddress GetAddress(uint address)
+        public IWord GetWord(ushort address)
         {
+            // registers
+            if (address <= 0x031)
+            {
+                return registers[address];
+            }
             //unswitchedErasable
-            if (address <= 0x2FF)
+            else if (address <= 0x2FF)
             {
-                return new MemoryAddress(unswitchedErasable, address);
+                return new ErasableMemory(new MemoryAddress(unswitchedErasable, address, address));
             }
             // switchedErasable
             else if (address <= 0x3FF)
@@ -102,7 +114,7 @@ public MemoryAddress GetAddress(uint address)
                 var bank = (unswitchedErasable[EB_Address] & 0x700) >> 8;
 
                 // retrieve bank, and adjust address by memory space offset
-                return new MemoryAddress(switchedErasable[bank], address - 0x300);
+                return new ErasableMemory(new MemoryAddress(switchedErasable[bank], address, (ushort)(address - 0x300)));
             }
             // commonFixed
             else if (address <= 0x7FF)
@@ -112,13 +124,22 @@ public MemoryAddress GetAddress(uint address)
 
                 // if we are in the super bit bank series
                 if(bank >= 32 && (ioChannels[7] & 0x40) > 0 )
-                    return new MemoryAddress(commonFixed[bank + 0x08], address - 0x400);
+                    return new ErasableMemory(new MemoryAddress(commonFixed[bank + 0x08], address, (ushort)(address - 0x400)));
                 else
-                    return new MemoryAddress(commonFixed[bank], address - 0x400);
+                    return new ErasableMemory(new MemoryAddress(commonFixed[bank], address, (ushort)(address - 0x400)));
             }
             // for now, return the 0 space address
             else 
-                return new MemoryAddress(unswitchedErasable, 0x07);
+                return new ErasableMemory(new MemoryAddress(unswitchedErasable, 0x07, 0x07));
+        }
+
+        internal RegisterType AddRegister<RegisterType>(RegisterType r, ushort address) where RegisterType : IWord, IRegister
+        {
+            registers[address] = r;
+
+            r.Memory = new MemoryAddress(unswitchedErasable, address, address);
+
+            return r;
         }
     }
 }
diff --git a/AGC/Processor.cs b/AGC/Processor.cs
index c42784c..cd91642 100644
--- a/AGC/Processor.cs
+++ b/AGC/Processor.cs
@@ -1,4 +1,5 @@
 using Apollo.Virtual.AGC.Base;
+using Apollo.Virtual.AGC.Registers;
 using System;
 using System.Collections.Generic;
 using System.Linq;
@@ -8,6 +9,9 @@ namespace Apollo.Virtual.AGC
 {
     // http://www.ibiblio.org/apollo/assembly_language_manual.html
 
+    /// <summary>
+    /// No parity bits are used in this implementation
+    /// </summary>
     public class Processor
     {
         internal MemoryMap Memory;
@@ -25,64 +29,64 @@ public class Processor
         /// <summary>
         /// Accumulator
         /// </summary>
-        public Register A;
+        internal Accumulator A;
 
         /// <summary>
         /// The lower product after MP instructions
         /// also known as L
         /// </summary>
-        public Register LP;
+        internal FullRegister LP;
 
         /// <summary>
         ///  Remainder from the DV instruction, 
         ///  and the return address after TC instructions
         /// </summary>
-        public Register Q;
+        internal FullRegister Q;
 
         /// <summary>
         /// Erasable Bank Register
         /// </summary>
-        public Register EB;
+        internal IWord EB;
 
         /// <summary>
         /// Fixed Bank Register
         /// </summary>
-        public Register FB;
+        internal IWord FB;
 
         /// <summary>
         /// Program Counter
         /// </summary>
-        public Register Z;
+        internal ProgramCounter Z;
 
         /// <summary>
         /// Both Banks Register
         /// </summary>
-        public Register BB;
+        internal IWord BB;
 
         /// <summary>
         /// Holds A value during interrupts, must be set by handler
         /// </summary>
-        public Register ARUPT;
+        internal IWord ARUPT;
 
         /// <summary>
         /// Holds L value during interrupts, must be set by handler
         /// </summary>
-        public Register LRUPT;
+        internal IWord LRUPT;
 
         /// <summary>
         /// Holds Q value during interrupts, must be set by handler
         /// </summary>
-        public Register QRUPT;
+        internal IWord QRUPT;
 
         /// <summary>
         /// Holds Z value during interrupts, must be set by handler
         /// </summary>
-        public Register ZRUPT;
+        internal IWord ZRUPT;
 
         /// <summary>
         /// Holds BB value during interrupts, must be set by handler
         /// </summary>
-        public Register BBRUPT;
+        internal IWord BBRUPT;
 
         /// <summary>
         /// Stores the value at the return address of an interrupt service routine.
@@ -90,36 +94,36 @@ public class Processor
         /// The CPU automatically loads this register before running an interrupt service routine.
         /// TODO: this might not be used, may have issues?
         /// </summary>
-        public Register BRUPT;
+        internal IWord BRUPT;
 
         /// <summary>
         /// Cycle Right Register, value written is automatically cycled right
         /// least significant bit (1), wrapping into bit 15
         /// </summary>
-        public Register CYR;
+        internal IWord CYR;
 
         /// <summary>
         /// Shift Right Register, value writtin is automatically shifted right
         /// most significant bit (15) is duplicated into bit 14, least significant bit 1 is discarded
         /// </summary>
-        public Register SR;
+        internal IWord SR;
 
         /// <summary>
         /// Cycle Left Register, value is read back is automatically cycled left
         /// most significant bit (15), wrapping into bit 1
         /// </summary>
-        public Register CYL;
+        internal IWord CYL;
 
         /// <summary>
         /// Edit Polish Opcode Register, used mainly for decoding interpreter instructions
         /// Value written is automatically shifted right 7 positions and the upper 8 bites are zeroed
         /// </summary>
-        public Register EDOP;
+        internal IWord EDOP;
 
         /// <summary>
         /// Paired with TIME1, to make 28 bit time value
         /// </summary>
-        public Register TIME2;
+        internal IWord TIME2;
 
         /// <summary>
         /// 15-bit 1's compliment counter, incremented every 10ms.
@@ -128,7 +132,7 @@ public class Processor
         /// This forms a 28-bit value capable of tracking time for 2^28 * 10 ms, or about 31 days
         /// Master clock for the AGC
         /// </summary>
-        public Register TIME1;
+        internal IWord TIME1;
 
         /// <summary>
         /// 15-bit 1's compliment counter, incremented every 10ms.
@@ -137,21 +141,21 @@ public class Processor
         /// 5ms out of phase with TIME4. if a routine is less than 4ms, they will not conflict
         /// Software typically loads this with a value chosen to insure a desired interrupt rate
         /// </summary>
-        public Register TIME3;
+        internal IWord TIME3;
 
         /// <summary>
         /// See TIME3
         /// Upon overflow, requests an interrupt (T4RUPT) which vectors to ISR @4020 (0x810)
         /// Services the DSKY's display
         /// </summary>
-        public Register TIME4;
+        internal IWord TIME4;
 
         /// <summary>
         /// See TIME3
         /// Upon overflow, requests an interrupt (T5RUPT) which vectors to ISR @4010 (0x808)
         /// Used by the DAP (Digital Auto Pilot)
         /// </summary>
-        public Register TIME5;
+        internal IWord TIME5;
 
         /// <summary>
         /// 15-bit 1's compliment counter, incremented every 1/1600 seconds by means of a DINC unprogrammed sequence.
@@ -160,58 +164,58 @@ public class Processor
         /// then turns off the T6RUPT counter-enable bit
         /// Used by the DAP of the LM to control RCS
         /// </summary>
-        public Register TIME6;
+        internal IWord TIME6;
 
         /// <summary>
         /// Inner Gimbal Angle
         /// </summary>
-        public Register CDUX;
+        internal IWord CDUX;
 
         /// <summary>
         /// Middle Gimbal Angle
         /// </summary>
-        public Register CDUY;
+        internal IWord CDUY;
 
         /// <summary>
         /// Outer Gimbal Angle
         /// </summary>
-        public Register CDUZ;
+        internal IWord CDUZ;
 
         /// <summary>
         /// Orientation of the optics subsystem
         /// Trunnion Angle
         /// </summary>
-        public Register OPTY;
+        internal IWord OPTY;
 
         /// <summary>
         /// Orientation of the optics subsystem
         /// Shaft Angle
         /// </summary>
-        public Register OPTX;
+        internal IWord OPTX;
 
         /// <summary>
         /// Pulsed Integrating Pendulous Accelerometer
         /// Monitors vehicle velocity
         /// </summary>
-        public Register PIPAX;
+        internal IWord PIPAX;
 
         /// <summary>
         /// Pulsed Integrating Pendulous Accelerometer
         /// Monitors vehicle velocity
         /// </summary>
-        public Register PIPAY;
+        internal IWord PIPAY;
 
         /// <summary>
         /// Pulsed Integrating Pendulous Accelerometer
         /// Monitors vehicle velocity
         /// </summary>
-        public Register PIPAZ;
+        internal IWord PIPAZ;
 
         /// <summary>
         /// Received uplink data from a ground stating
         /// After data is received the UPRUPT interupt is set
         /// </summary>
-        public Register INLINK;
+        internal IWord INLINK;
 
         #endregion
 
@@ -224,60 +228,60 @@ public Processor(MemoryMap memory)
             // configure registers
 
             // main registers?
-            A = new Register(memory.GetAddress(0x0));
-            LP = new Register(memory.GetAddress(0x1));
-            Q = new Register(memory.GetAddress(0x2));
-            EB = new Register(memory.GetAddress(0x3));
-            FB = new Register(memory.GetAddress(0x4));
-            Z = new Register(memory.GetAddress(0x5));
-            BB = new Register(memory.GetAddress(0x6));
+            A = memory.AddRegister(new Accumulator(), 0x0);
+            LP = memory.AddRegister(new FullRegister(), 0x01);
+            Q = memory.AddRegister(new FullRegister(), 0x02);
+            EB = memory.GetWord(0x3);
+            FB = memory.GetWord(0x4);
+            Z = memory.AddRegister(new ProgramCounter(), 0x05);
+            BB = memory.GetWord(0x6);
 
-            memory[0x7] = 0; // this is always set to 0, TODO: need to hard code?
+            //memory[0x7] = 0; // this is always set to 0, TODO: need to hard code?
 
             // interrupt helper registers
-            ARUPT = new Register(memory.GetAddress(0x8));
-            LRUPT = new Register(memory.GetAddress(0x9));
-            QRUPT = new Register(memory.GetAddress(0xA));
+            ARUPT = memory.AddRegister(new Register(), 0x8);
+            LRUPT = memory.AddRegister(new Register(), 0x9);
+            QRUPT = memory.AddRegister(new Register(), 0xA);
             // 0XB, 0XC are spares. not used?
-            ZRUPT = new Register(memory.GetAddress(0xD));
-            BBRUPT = new Register(memory.GetAddress(0xE));
-            BRUPT = new Register(memory.GetAddress(0xF));
+            ZRUPT = memory.AddRegister(new Register(), 0xD);
+            BBRUPT = memory.AddRegister(new Register(), 0xE);
+            BRUPT = memory.AddRegister(new Register(), 0xF);
 
             // editing registers
-            CYR = new Register(memory.GetAddress(0x10));
-            SR = new Register(memory.GetAddress(0x11));
-            CYL = new Register(memory.GetAddress(0x12));
-            EDOP = new Register(memory.GetAddress(0x13));
+            CYR = memory.GetWord(0x10);
+            SR = memory.GetWord(0x11);
+            CYL = memory.GetWord(0x12);
+            EDOP = memory.GetWord(0x13);
 
             // time registers
-            TIME2 = new Register(memory.GetAddress(0x14));
-            TIME1 = new Register(memory.GetAddress(0x15));
-            TIME3 = new Register(memory.GetAddress(0x16));
-            TIME4 = new Register(memory.GetAddress(0x17));
-            TIME5 = new Register(memory.GetAddress(0x18));
-            TIME6 = new Register(memory.GetAddress(0x19));
+            TIME2 = memory.GetWord(0x14);
+            TIME1 = memory.GetWord(0x15);
+            TIME3 = memory.GetWord(0x16);
+            TIME4 = memory.GetWord(0x17);
+            TIME5 = memory.GetWord(0x18);
+            TIME6 = memory.GetWord(0x19);
 
             // orientation registers
-            CDUX = new Register(memory.GetAddress(0x1A));
-            CDUY = new Register(memory.GetAddress(0x1B));
-            CDUZ = new Register(memory.GetAddress(0x1C));
-            OPTY = new Register(memory.GetAddress(0x1D));
-            OPTX = new Register(memory.GetAddress(0x1E));
-            PIPAX = new Register(memory.GetAddress(0x1F));
-            PIPAY = new Register(memory.GetAddress(0x20));
-            PIPAZ = new Register(memory.GetAddress(0x21));
+            CDUX = memory.AddRegister(new Register(), 0x1A);
+            CDUY = memory.AddRegister(new Register(), 0x1B);
+            CDUZ = memory.AddRegister(new Register(), 0x1C);
+            OPTY = memory.AddRegister(new Register(), 0x1D);
+            OPTX = memory.AddRegister(new Register(), 0x1E);
+            PIPAX = memory.AddRegister(new Register(), 0x1F);
+            PIPAY = memory.AddRegister(new Register(), 0x20);
+            PIPAZ = memory.AddRegister(new Register(), 0x21);
             // LM Only Pitch, Yaw, and Roll registers
 
-            INLINK = new Register(memory.GetAddress(0x25));
+            INLINK = memory.AddRegister(new Register(), 0x25);
         }
 
         public void Execute()
         {
             // get address of instruction to run
-            var address = Memory.GetAddress(Z.Read());
+            var address = Memory.GetWord(Z.Read());
 
             // update Z
-            Z.Write((ushort)(Z.Read() + 1));
+            Z.Increment();
 
             var code = (ushort)(address.Read() >> 12);
             var K = (ushort)(address.Read() & 0xFFF);
diff --git a/AGC/Registers/Accumulator.cs b/AGC/Registers/Accumulator.cs
new file mode 100644
index 0000000..e88fe64
--- /dev/null
+++ b/AGC/Registers/Accumulator.cs
@@ -0,0 +1,16 @@
+using Apollo.Virtual.AGC.Base;
+using System;
+using System.Collections.Generic;
+using System.Linq;
+using System.Text;
+
+namespace Apollo.Virtual.AGC.Registers
+{
+    class Accumulator : FullRegister
+    {
+        public void Add(IWord w)
+        {
+
+        }
+    }
+}
diff --git a/AGC/Registers/FullRegister.cs b/AGC/Registers/FullRegister.cs
new file mode 100644
index 0000000..ad0eec6
--- /dev/null
+++ b/AGC/Registers/FullRegister.cs
@@ -0,0 +1,55 @@
+using Apollo.Virtual.AGC.Base;
+using System;
+using System.Collections.Generic;
+using System.Linq;
+using System.Text;
+
+namespace Apollo.Virtual.AGC.Registers
+{
+    /// <summary>
+    /// Register that holds a 16-bit value
+    /// </summary>
+    class FullRegister: IWord, IRegister
+    {
+        protected MemoryAddress memory;
+
+        public bool Is16Bit
+        {
+            get { return true; }
+        }
+
+        public void Write(IWord word)
+        {
+            if (word.Is16Bit)
+                memory.Write(word.Read());
+            // if a 15-bit word, must sign extend it
+            else
+            {
+                uint value = word.Read();
+
+                // take lower 15-bits
+                value = value & 0x7FFF;
+
+                // shift left 1 and take 16th bit, combine with lower 15 bits
+                value = ((value << 1) & 0x8000) | value;
+
+                memory.Write((ushort)value);
+            }
+        }
+
+        public ushort Address
+        {
+            get { return memory.Address; }
+        }
+
+        public ushort Read()
+        {
+            return memory.Read();
+        }
+
+        MemoryAddress IRegister.Memory
+        {
+            set { this.memory = value; }
+        }
+    }
+}
diff --git a/AGC/Registers/ProgramCounter.cs b/AGC/Registers/ProgramCounter.cs
new file mode 100644
index 0000000..2f1d00b
--- /dev/null
+++ b/AGC/Registers/ProgramCounter.cs
@@ -0,0 +1,59 @@
+using Apollo.Virtual.AGC.Base;
+using System;
+using System.Collections.Generic;
+using System.Linq;
+using System.Text;
+
+namespace Apollo.Virtual.AGC.Registers
+{
+    /// <summary>
+    /// 12-bit register for the address of the next instruction
+    /// </summary>
+    class ProgramCounter: IWord, IRegister
+    {
+        MemoryAddress memory;
+
+        public void Increment()
+        {
+            uint value = memory.Read();
+
+            // increment
+            value++;
+
+            // only store lower 12 bits
+            memory.Write((ushort)(value & 0xFFF));
+        }
+
+        public bool Is16Bit
+        {
+            get { return false; }
+        }
+
+        public void Write(IWord word)
+        {
+            // only store lower 12 bits
+            memory.Write((ushort)(word.Read() & 0xFFF));
+        }
+
+        public void Write(ushort value)
+        {
+            // only store lower 12 bits
+            memory.Write((ushort)(value & 0xFFF));
+        }
+
+        public ushort Address
+        {
+            get { return memory.Address; }
+        }
+
+        public ushort Read()
+        {
+            return memory.Read();
+        }
+
+        MemoryAddress IRegister.Memory
+        {
+            set { this.memory = value; }
+        }
+    }
+}
diff --git a/AGC/Registers/Register.cs b/AGC/Registers/Register.cs
new file mode 100644
index 0000000..169a997
--- /dev/null
+++ b/AGC/Registers/Register.cs
@@ -0,0 +1,16 @@
+using Apollo.Virtual.AGC.Base;
+using System;
+using System.Collections.Generic;
+using System.Linq;
+using System.Text;
+
+namespace Apollo.Virtual.AGC.Registers
+{
+    class Register : ErasableMemory, IRegister
+    {
+        MemoryAddress IRegister.Memory
+        {
+            set { this.memory = memory; }
+        }
+    }
+}