Pinned Loading

1. Goldschmidt_Integer_Divider_Parallel Goldschmidt_Integer_Divider_Parallel Public

   A Goldschmidt integer divider written in verilog. Similar to Newton-Raphson but the divison step can be pipelined.

   Verilog 15 2

2. uvmsc_wb4_uvc uvmsc_wb4_uvc Public

   UVM-SystemC Wisbone B4(pipeline) Verification Component

   C++

3. wb4_fifo_lib wb4_fifo_lib Public

   Library of Wishbone B4 (Pipelined) FIFOs

   C++

4. cdc_lib cdc_lib Public

   Basic generic Clock Domain Crossing modules

   Verilog

5. uvmsc_reset_generator uvmsc_reset_generator Public

   UVM-SystemC Reset Generator Verification Component

   C++

6. uvmsc_wave_trace uvmsc_wave_trace Public

   UVM-SystemC Verilator trace capturing component

   C++