CPU, RAM, & RTC Board
This board is intended for use with the z80ctrl board and consolidates a Z80 CPU, 512KB of bankable RAM, and RTC in a single slot. This board is not usable without the z80ctrl board to initialize the RAM and serve as a bridge from the Z80 to the RTC.
This board is intended to use the Zilog Z84C0010PEG 10MHz Z80 CPU. Other pin-compatible Z80 chips may work, but the z80ctrl can generate a clock signal up to 10MHz, so the CPU should be able to handle this. The CPU is connected to the RAM and RC2014 bus. There are pullup resistors for the NMI, WAIT, BUSRQ, and INT lines to prevent false triggering. The RESET line is expected to be pulled up on the backplane. The CPU is not directly connected to the RTC chip, so the z80ctrl board is required to access it.
The 512KB RAM is divided into 16 32KB banks, any of which can be mapped into the upper and lower halves of the Z80's 64KB address space. The two 4-bit bank addresses are stored in an 8-bit register accessible at I/O addresses 70-7FH. All 16 addresses are mirrors of the same register. The bank register is write-only so software must independently keep track of the current bank addresses. The lower nybble specifies the bank for the lower 32K and the upper nybble specifies the bank for the upper 32K. Therefore a value of 10H maps the first 64K of physical RAM to the Z80's 64K address space. The bank register is not initialized on power up so random banks will be selected until the z80ctrl initializes it.
The DS1302+ RTC chip is connected to the SPI signals that the z80ctrl exposes on the user lines of the RC2014 bus. The SCK, MISO, and AUXCS1 lines from the z80ctrl board are used. The MISO line handles both inbound and outbound traffic since the RTC uses a three-wire protocol instead of true SPI. When the z80ctrl wants to access the RTC, it disables SPI, asserts the AUXCS1 line, and bit-bangs the three-wire protocol using the SCK and MISO lines. The z80ctrl exposes the RTC to the Z80 on I/O ports 00-02H. A value of 0 should be written to port 0 to select the RTC (other values may be used to select different SPI peripherals on other boards). Port 1 should be set to the address of the desired RTC register from the datasheet. The selected value can then be read or written on port 2.
- Refer to the picture, bill of materials, and schematics for your revision to match parts to their labels on the PCB.
- Insert and solder the components in order from shortest to tallest: resistors, crystal, capacitors, sockets, battery holder, and finally angled pin headers headers.
- Make a solder bump on the GND pad of the battery holder before you solder BT1 in place. The battery won't make good contact with the pad otherwise, and it will be hard to add after the fact.
- The RTC (U5) may be omitted if not desired. If the RTC is omitted, BT1, Y1, R1, and Q1 can also be omitted.
- Important: The RTC requires the six user pins to be connected to the z80ctrl in order to access the SPI bus. If you do not have the user pins connected, you should remove the RTC chip because it may interfere with operation of the SPI peripherals on the z80ctrl if its chip select is left floating. The sockets supplied with the Backplane Pro are missing the last 4 pins on the extended header and therefore the chip select line for the RTC will not be connected. You can solder in an additional 4 pin female header to the sockets for the z80ctrl and CPU/RAM/RTC board. Also, the SC11x backplanes have jumpers for the user pins that must be installed between the sockets.
- The z80ctrl IO Expander Board also includes an RTC. The RTC should be installed in one board or the other, but not both. If RTCs are installed in both, they will fight for control of the SPI bus and neither one will work.
