From d34add0ba1c2d0c9d1d54c28e519b598128c9edb Mon Sep 17 00:00:00 2001 From: Mehdi Amini Date: Sat, 14 Nov 2020 16:57:28 +0000 Subject: [PATCH 1/5] Fix build (`ninja check` without running `ninja` first) 9218ff50f9 removed the BUILD.txt file, and as a subtle side-effect libLLVMFrontendOpenACC wasn't a dependency of `ninja check` anymore. However llvm-config requires all components to be built, and the relevant test is broken when libLLVMFrontendOpenACC isn't built. Unittest for libLLVMFrontendOpenACC are pending, but this addition should fix some bots in the meantime. --- llvm/unittests/Frontend/CMakeLists.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/llvm/unittests/Frontend/CMakeLists.txt b/llvm/unittests/Frontend/CMakeLists.txt index 4b48945b2854ce..d10d08ef190a8f 100644 --- a/llvm/unittests/Frontend/CMakeLists.txt +++ b/llvm/unittests/Frontend/CMakeLists.txt @@ -2,6 +2,7 @@ set(LLVM_LINK_COMPONENTS Analysis Core FrontendOpenMP + FrontendOpenACC Support Passes TransformUtils From 9671790b4f7d660790eacb89d15228842a47b149 Mon Sep 17 00:00:00 2001 From: "Paul C. Anagnostopoulos" Date: Sat, 14 Nov 2020 12:37:48 -0500 Subject: [PATCH 2/5] [TableGen] Fix missing braces in if statement --- llvm/lib/TableGen/Record.cpp | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/llvm/lib/TableGen/Record.cpp b/llvm/lib/TableGen/Record.cpp index 221f74f2ab0215..43b906ea22481b 100644 --- a/llvm/lib/TableGen/Record.cpp +++ b/llvm/lib/TableGen/Record.cpp @@ -2608,9 +2608,10 @@ void RecordKeeper::startBackendTimer(StringRef Name) { void RecordKeeper::stopBackendTimer() { if (TimingGroup) { - if (BackendTimer) + if (BackendTimer) { stopTimer(); BackendTimer = false; + } } } From c35448ba80bdaddaf4d4f7d2076da3b24135148a Mon Sep 17 00:00:00 2001 From: Fangrui Song Date: Sat, 14 Nov 2020 09:53:34 -0800 Subject: [PATCH 3/5] [Driver][test] Fix cc1-spawnprocess.c --- clang/test/Driver/cc1-spawnprocess.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/clang/test/Driver/cc1-spawnprocess.c b/clang/test/Driver/cc1-spawnprocess.c index 7f6dad66f3096f..a6ff7d148604e3 100644 --- a/clang/test/Driver/cc1-spawnprocess.c +++ b/clang/test/Driver/cc1-spawnprocess.c @@ -42,6 +42,7 @@ // RUN: %clang -fintegrated-cc1 -c %t1.cpp %t2.cpp %t3.cpp -### 2>&1 | FileCheck %s --check-prefix=NO // -fintegrated-cc1 works with cc1as. +// macOS triples have an extra -x assembler-with-cpp job so (in-process) is not triggered. // RUN: echo > %t.s -// RUN: %clang -fintegrated-cc1 -fintegrated-as -c -### %t.s 2>&1 | FileCheck %s --check-prefix=YES -// RUN: %clang -fno-integrated-cc1 -c -### %t.s 2>&1 | FileCheck %s --check-prefix=NO +// RUN: %clang --target=x86_64-linux -fintegrated-cc1 -fintegrated-as -c -### %t.s 2>&1 | FileCheck %s --check-prefix=YES +// RUN: %clang --target=x86_64-linux -fno-integrated-cc1 -c -### %t.s 2>&1 | FileCheck %s --check-prefix=NO From 02ef4bcb9ab8ebc51e9b4616f1110237c34209e1 Mon Sep 17 00:00:00 2001 From: Jacques Pienaar Date: Sat, 14 Nov 2020 10:29:01 -0800 Subject: [PATCH 4/5] [mlir][shape] Make attr-dict placement consistent Also follows what we do in std ops too and move it before :. --- .../include/mlir/Dialect/Shape/IR/ShapeOps.td | 20 +++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td b/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td index a602d82fbd8c84..a852d900cf6985 100644 --- a/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td +++ b/mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td @@ -178,7 +178,7 @@ def Shape_FromExtentTensorOp : Shape_Op<"from_extent_tensor", [NoSideEffect]> { let arguments = (ins IndexTensor:$input); let results = (outs Shape_ShapeType:$result); - let assemblyFormat = "attr-dict $input `:` type($input)"; + let assemblyFormat = "$input attr-dict `:` type($input)"; } def Shape_IsBroadcastableOp : Shape_Op<"is_broadcastable", [Commutative]> { @@ -204,7 +204,7 @@ def Shape_IsBroadcastableOp : Shape_Op<"is_broadcastable", [Commutative]> { Shape_ShapeOrExtentTensorType:$rhs); let results = (outs I1:$result); - let assemblyFormat = "$lhs `,` $rhs attr-dict `:` type($lhs) `,` type($rhs)"; + let assemblyFormat = "$lhs `,` $rhs attr-dict `:` type($lhs) `,` type($rhs)"; } def Shape_RankOp : Shape_Op<"rank", [NoSideEffect]> { @@ -216,7 +216,7 @@ def Shape_RankOp : Shape_Op<"rank", [NoSideEffect]> { let arguments = (ins Shape_ShapeOrExtentTensorType:$shape); let results = (outs Shape_SizeOrIndexType:$rank); - let assemblyFormat = "$shape `:` type($shape) `->` type($rank) attr-dict"; + let assemblyFormat = "$shape attr-dict `:` type($shape) `->` type($rank)"; let hasFolder = 1; let hasCanonicalizer = 1; @@ -236,7 +236,7 @@ def Shape_ToExtentTensorOp : Shape_Op<"to_extent_tensor", [NoSideEffect]> { let arguments = (ins Shape_ShapeOrExtentTensorType:$input); let results = (outs IndexTensor:$result); - let assemblyFormat = "attr-dict $input `:` type($input) `->` type($result)"; + let assemblyFormat = "$input attr-dict `:` type($input) `->` type($result)"; let hasFolder = 1; } @@ -250,8 +250,8 @@ def Shape_GetExtentOp : Shape_Op<"get_extent", [NoSideEffect]> { let arguments = (ins Shape_ShapeOrExtentTensorType:$shape, Shape_SizeOrIndexType:$dim); let results = (outs Shape_SizeOrIndexType:$extent); - let assemblyFormat = "$shape `,` $dim `:` type($shape) `,` type($dim) `->` " - "type($extent) attr-dict"; + let assemblyFormat = "$shape `,` $dim attr-dict `:` type($shape) `,` type($dim) `->` " + "type($extent)"; let builders = [ // Builder that allows passing a constant dimension as a simple integer. @@ -334,7 +334,7 @@ def Shape_MulOp : Shape_Op<"mul", [Commutative, NoSideEffect]> { let results = (outs Shape_SizeOrIndexType:$result); let assemblyFormat = [{ - $lhs `,` $rhs `:` type($lhs) `,` type($rhs) `->` type($result) attr-dict + $lhs `,` $rhs attr-dict `:` type($lhs) `,` type($rhs) `->` type($result) }]; let verifier = [{ return ::verifySizeOrIndexOp(*this); }]; @@ -356,7 +356,7 @@ def Shape_NumElementsOp : Shape_Op<"num_elements", [NoSideEffect]> { let builders = [OpBuilderDAG<(ins "Value":$shape)>]; - let assemblyFormat = "$shape `:` type($shape) `->` type($result) attr-dict"; + let assemblyFormat = "$shape attr-dict `:` type($shape) `->` type($result)"; let hasFolder = 1; let verifier = [{ return ::verifySizeOrIndexOp(*this); }]; @@ -421,7 +421,7 @@ def Shape_ShapeOfOp : Shape_Op<"shape_of", [NoSideEffect]> { let arguments = (ins AnyTypeOf<[AnyShaped, Shape_ValueShapeType]>:$arg); let results = (outs Shape_ShapeOrExtentTensorType:$result); - let assemblyFormat = "$arg `:` type($arg) `->` type($result) attr-dict"; + let assemblyFormat = "$arg attr-dict `:` type($arg) `->` type($result)"; let builders = [OpBuilderDAG<(ins "Value":$arg)>]; @@ -702,7 +702,7 @@ def Shape_CstrBroadcastableOp : Shape_Op<"cstr_broadcastable", [Commutative]> { Shape_ShapeOrExtentTensorType:$rhs); let results = (outs Shape_WitnessType:$result); - let assemblyFormat = "$lhs `,` $rhs `:` type($lhs) `,` type($rhs) attr-dict"; + let assemblyFormat = "$lhs `,` $rhs attr-dict `:` type($lhs) `,` type($rhs)"; let hasCanonicalizer = 1; let hasFolder = 1; From 2104783d024cc9cea215256b9ae8bf518395e5fa Mon Sep 17 00:00:00 2001 From: David Green Date: Sat, 14 Nov 2020 18:30:17 +0000 Subject: [PATCH 5/5] [AArch64] Remove unused check prefixes. NFC --- llvm/test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll | 8 ++++---- llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll | 4 ++-- .../CodeGen/AArch64/div-rem-pair-recomposition-signed.ll | 2 +- .../AArch64/div-rem-pair-recomposition-unsigned.ll | 2 +- llvm/test/CodeGen/AArch64/fast-isel-sdiv.ll | 4 ++-- .../AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 2 +- .../AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 2 +- 7 files changed, 12 insertions(+), 12 deletions(-) diff --git a/llvm/test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll b/llvm/test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll index 949de1a7c63740..49ce5a1f69a659 100644 --- a/llvm/test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll +++ b/llvm/test/CodeGen/AArch64/arm64-AdvSIMD-Scalar.ll @@ -1,7 +1,7 @@ -; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=apple -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=true | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-NOOPT -; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=apple -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=false | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-OPT -; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=generic -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=true | FileCheck %s -check-prefix=GENERIC -check-prefix=GENERIC-NOOPT -; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=generic -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=false | FileCheck %s -check-prefix=GENERIC -check-prefix=GENERIC-OPT +; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=apple -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=true | FileCheck %s -check-prefix=CHECK +; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=apple -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=false | FileCheck %s -check-prefix=CHECK +; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=generic -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=true | FileCheck %s -check-prefix=GENERIC +; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-eabi -aarch64-neon-syntax=generic -aarch64-enable-simd-scalar=true -asm-verbose=false -disable-adv-copy-opt=false | FileCheck %s -check-prefix=GENERIC define <2 x i64> @bar(<2 x i64> %a, <2 x i64> %b) nounwind readnone { ; CHECK-LABEL: bar: diff --git a/llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll b/llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll index b38b91e9d705e9..1f1d2326492b22 100644 --- a/llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll +++ b/llvm/test/CodeGen/AArch64/arm64-neon-2velem.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon -fp-contract=fast | FileCheck %s --check-prefixes=CHECK,GENERIC -; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon -fp-contract=fast -mcpu=exynos-m3 | FileCheck %s --check-prefixes=CHECK,EXYNOSM3 +; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon -fp-contract=fast | FileCheck %s --check-prefix=CHECK +; RUN: llc < %s -verify-machineinstrs -mtriple=arm64-none-linux-gnu -mattr=+neon -fp-contract=fast -mcpu=exynos-m3 | FileCheck %s --check-prefix=CHECK declare <2 x double> @llvm.aarch64.neon.fmulx.v2f64(<2 x double>, <2 x double>) diff --git a/llvm/test/CodeGen/AArch64/div-rem-pair-recomposition-signed.ll b/llvm/test/CodeGen/AArch64/div-rem-pair-recomposition-signed.ll index 22bdf92db79fe9..11f242fde3dd53 100644 --- a/llvm/test/CodeGen/AArch64/div-rem-pair-recomposition-signed.ll +++ b/llvm/test/CodeGen/AArch64/div-rem-pair-recomposition-signed.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s --check-prefixes=ALL,X64 +; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s --check-prefix=ALL ; If the target does not have a single div/rem operation, ; -div-rem-pairs pass will decompose the remainder calculation as: diff --git a/llvm/test/CodeGen/AArch64/div-rem-pair-recomposition-unsigned.ll b/llvm/test/CodeGen/AArch64/div-rem-pair-recomposition-unsigned.ll index 5237704813e5ae..fe603de447baea 100644 --- a/llvm/test/CodeGen/AArch64/div-rem-pair-recomposition-unsigned.ll +++ b/llvm/test/CodeGen/AArch64/div-rem-pair-recomposition-unsigned.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s --check-prefixes=ALL,X64 +; RUN: llc < %s -mtriple=aarch64-unknown-unknown | FileCheck %s --check-prefix=ALL ; If the target does not have a single div/rem operation, ; -div-rem-pairs pass will decompose the remainder calculation as: diff --git a/llvm/test/CodeGen/AArch64/fast-isel-sdiv.ll b/llvm/test/CodeGen/AArch64/fast-isel-sdiv.ll index 2fd0ec02f968cf..d36b92b8c26b89 100644 --- a/llvm/test/CodeGen/AArch64/fast-isel-sdiv.ll +++ b/llvm/test/CodeGen/AArch64/fast-isel-sdiv.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,ISEL -; RUN: llc -mtriple=aarch64-linux-gnu -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefixes=CHECK,FAST +; RUN: llc -mtriple=aarch64-linux-gnu -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK +; RUN: llc -mtriple=aarch64-linux-gnu -fast-isel -fast-isel-abort=1 -verify-machineinstrs < %s | FileCheck %s --check-prefix=CHECK define i32 @sdiv_i32_exact(i32 %a) { ; CHECK-LABEL: sdiv_i32_exact: diff --git a/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll b/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll index a9d5de8b435e43..670f198fd0d3b2 100644 --- a/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll +++ b/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck %s --check-prefixes=CHECK,AARCH64 +; RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck %s --check-prefix=CHECK ; We are looking for the following pattern here: ; (X & (C l>> Y)) ==/!= 0 diff --git a/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll b/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll index 80fe831037af91..00bf33360871d6 100644 --- a/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll +++ b/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll @@ -1,5 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck %s --check-prefixes=CHECK,AARCH64 +; RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck %s --check-prefix=CHECK ; We are looking for the following pattern here: ; (X & (C << Y)) ==/!= 0