diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp index 56583811809b1b..4eef66ffe367f5 100644 --- a/llvm/lib/IR/Verifier.cpp +++ b/llvm/lib/IR/Verifier.cpp @@ -2931,8 +2931,7 @@ void Verifier::visitCallBase(CallBase &Call) { Call.getArgOperand(i), Call); } - // Temporarily disabled this check until LLPC has been fixed. - if (0 && Call.paramHasAttr(i, Attribute::ImmArg)) { + if (Call.paramHasAttr(i, Attribute::ImmArg)) { Value *ArgVal = Call.getArgOperand(i); Assert(isa(ArgVal) || isa(ArgVal), "immarg operand has non-immediate parameter", ArgVal, Call); diff --git a/llvm/test/Verifier/ARM/intrinsic-immarg.ll b/llvm/test/Verifier/ARM/intrinsic-immarg.ll new file mode 100644 index 00000000000000..d069dd682fdb58 --- /dev/null +++ b/llvm/test/Verifier/ARM/intrinsic-immarg.ll @@ -0,0 +1,111 @@ +; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s + +declare void @llvm.arm.cdp(i32, i32, i32, i32, i32, i32) nounwind + +define void @cdp(i32 %a) #0 { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: %load = load i32, i32* %a.addr, align 4 + ; CHECK-NEXT: call void @llvm.arm.cdp(i32 %load, i32 2, i32 3, i32 4, i32 5, i32 6) + %a.addr = alloca i32, align 4 + store i32 %a, i32* %a.addr, align 4 + %load = load i32, i32* %a.addr, align 4 + call void @llvm.arm.cdp(i32 %load, i32 2, i32 3, i32 4, i32 5, i32 6) + ret void +} + +declare void @llvm.arm.cdp2(i32, i32, i32, i32, i32, i32) nounwind +define void @cdp2(i32 %a) #0 { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: %load = load i32, i32* %a.addr, align 4 + ; CHECK-NEXT: call void @llvm.arm.cdp2(i32 %load, i32 2, i32 3, i32 4, i32 5, i32 6) + %a.addr = alloca i32, align 4 + store i32 %a, i32* %a.addr, align 4 + %load = load i32, i32* %a.addr, align 4 + call void @llvm.arm.cdp2(i32 %load, i32 2, i32 3, i32 4, i32 5, i32 6) + ret void +} + +declare { i32, i32 } @llvm.arm.mrrc(i32, i32, i32) nounwind +define void @mrrc(i32 %arg0, i32 %arg1, i32 %arg2) #0 { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg0 + ; CHECK-NEXT: %ret0 = call { i32, i32 } @llvm.arm.mrrc(i32 %arg0, i32 0, i32 0) + %ret0 = call { i32, i32 } @llvm.arm.mrrc(i32 %arg0, i32 0, i32 0) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg1 + ; CHECK-NEXT: %ret1 = call { i32, i32 } @llvm.arm.mrrc(i32 0, i32 %arg1, i32 0) + %ret1 = call { i32, i32 } @llvm.arm.mrrc(i32 0, i32 %arg1, i32 0) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret2 = call { i32, i32 } @llvm.arm.mrrc(i32 0, i32 0, i32 %arg2) + %ret2 = call { i32, i32 } @llvm.arm.mrrc(i32 0, i32 0, i32 %arg2) + ret void +} + +declare { i32, i32 } @llvm.arm.mrrc2(i32, i32, i32) nounwind +define void @mrrc2(i32 %arg0, i32 %arg1, i32 %arg2) #0 { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg0 + ; CHECK-NEXT: %ret0 = call { i32, i32 } @llvm.arm.mrrc2(i32 %arg0, i32 0, i32 0) + %ret0 = call { i32, i32 } @llvm.arm.mrrc2(i32 %arg0, i32 0, i32 0) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg1 + ; CHECK-NEXT: %ret1 = call { i32, i32 } @llvm.arm.mrrc2(i32 0, i32 %arg1, i32 0) + %ret1 = call { i32, i32 } @llvm.arm.mrrc2(i32 0, i32 %arg1, i32 0) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret2 = call { i32, i32 } @llvm.arm.mrrc2(i32 0, i32 0, i32 %arg2) + %ret2 = call { i32, i32 } @llvm.arm.mrrc2(i32 0, i32 0, i32 %arg2) + ret void +} + +declare void @llvm.arm.mcrr(i32, i32, i32, i32, i32) nounwind +define void @mcrr(i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg0 + ; CHECK-NEXT: call void @llvm.arm.mcrr(i32 %arg0, i32 1, i32 2, i32 3, i32 4) + call void @llvm.arm.mcrr(i32 %arg0, i32 1, i32 2, i32 3, i32 4) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg1 + ; CHECK-NEXT: call void @llvm.arm.mcrr(i32 0, i32 %arg1, i32 2, i32 3, i32 4) + call void @llvm.arm.mcrr(i32 0, i32 %arg1, i32 2, i32 3, i32 4) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg4 + ; CHECK-NEXT: call void @llvm.arm.mcrr(i32 0, i32 1, i32 2, i32 3, i32 %arg4) + call void @llvm.arm.mcrr(i32 0, i32 1, i32 2, i32 3, i32 %arg4) + ret void +} + +declare void @llvm.arm.mcrr2(i32, i32, i32, i32, i32) nounwind +define void @mcrr2(i32 %arg0, i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg0 + ; CHECK-NEXT: call void @llvm.arm.mcrr2(i32 %arg0, i32 1, i32 2, i32 3, i32 4) + call void @llvm.arm.mcrr2(i32 %arg0, i32 1, i32 2, i32 3, i32 4) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg1 + ; CHECK-NEXT: call void @llvm.arm.mcrr2(i32 0, i32 %arg1, i32 2, i32 3, i32 4) + call void @llvm.arm.mcrr2(i32 0, i32 %arg1, i32 2, i32 3, i32 4) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg4 + ; CHECK-NEXT: call void @llvm.arm.mcrr2(i32 0, i32 1, i32 2, i32 3, i32 %arg4) + call void @llvm.arm.mcrr2(i32 0, i32 1, i32 2, i32 3, i32 %arg4) + ret void +} + +declare i32 @llvm.arm.space(i32, i32) nounwind +define i32 @space(i32 %arg0, i32 %arg1) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg0 + ; CHECK-NEXT: call i32 @llvm.arm.space(i32 %arg0, i32 %arg1) + %space = call i32 @llvm.arm.space(i32 %arg0, i32 %arg1) + ret i32 %space +} diff --git a/llvm/test/Verifier/Mips/intrinsic-immarg.ll b/llvm/test/Verifier/Mips/intrinsic-immarg.ll new file mode 100644 index 00000000000000..dfe5aa94ab97f8 --- /dev/null +++ b/llvm/test/Verifier/Mips/intrinsic-immarg.ll @@ -0,0 +1,82 @@ +; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s + +define void @ld_b(<16 x i8> * %ptr, i8 * %ldptr, i32 %offset) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %offset + ; CHECK-NEXT: %a = call <16 x i8> @llvm.mips.ld.b(i8* %ldptr, i32 %offset) + %a = call <16 x i8> @llvm.mips.ld.b(i8* %ldptr, i32 %offset) + store <16 x i8> %a, <16 x i8> * %ptr, align 16 + ret void +} + +define void @st_b(<16 x i8> * %ptr, i8 * %ldptr, i32 %offset, i8 * %stptr) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %offset + ; CHECK-NEXT: call void @llvm.mips.st.b(<16 x i8> %a, i8* %stptr, i32 %offset) + %a = call <16 x i8> @llvm.mips.ld.b(i8* %ldptr, i32 0) + call void @llvm.mips.st.b(<16 x i8> %a, i8* %stptr, i32 %offset) + ret void +} + +define void @ld_w(<4 x i32> * %ptr, i8 * %ldptr, i32 %offset) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %offset + ; CHECK-NEXT: %a = call <4 x i32> @llvm.mips.ld.w(i8* %ldptr, i32 %offset) + %a = call <4 x i32> @llvm.mips.ld.w(i8* %ldptr, i32 %offset) + store <4 x i32> %a, <4 x i32> * %ptr, align 16 + ret void +} + +define void @st_w(<8 x i16> * %ptr, i8 * %ldptr, i32 %offset, i8 * %stptr) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %offset + ; CHECK-NEXT: call void @llvm.mips.st.w(<4 x i32> %a, i8* %stptr, i32 %offset) + %a = call <4 x i32> @llvm.mips.ld.w(i8* %ldptr, i32 0) + call void @llvm.mips.st.w(<4 x i32> %a, i8* %stptr, i32 %offset) + ret void +} + +define void @ld_h(<8 x i16> * %ptr, i8 * %ldptr, i32 %offset) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %offset + ; CHECK-NEXT: %a = call <8 x i16> @llvm.mips.ld.h(i8* %ldptr, i32 %offset) + %a = call <8 x i16> @llvm.mips.ld.h(i8* %ldptr, i32 %offset) + store <8 x i16> %a, <8 x i16> * %ptr, align 16 + ret void +} + +define void @st_h(<8 x i16> * %ptr, i8 * %ldptr, i32 %offset, i8 * %stptr) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %offset + ; CHECK-NEXT: call void @llvm.mips.st.h(<8 x i16> %a, i8* %stptr, i32 %offset) + %a = call <8 x i16> @llvm.mips.ld.h(i8* %ldptr, i32 0) + call void @llvm.mips.st.h(<8 x i16> %a, i8* %stptr, i32 %offset) + ret void +} + +define void @ld_d(<2 x i64> * %ptr, i8 * %ldptr, i32 %offset) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %offset + ; CHECK-NEXT: %a = call <2 x i64> @llvm.mips.ld.d(i8* %ldptr, i32 %offset) + %a = call <2 x i64> @llvm.mips.ld.d(i8* %ldptr, i32 %offset) + store <2 x i64> %a, <2 x i64> * %ptr, align 16 + ret void +} + +define void @st_d(<2 x i64> * %ptr, i8 * %ldptr, i32 %offset, i8 * %stptr) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %offset + ; CHECK-NEXT: call void @llvm.mips.st.d(<2 x i64> %a, i8* %stptr, i32 %offset) + %a = call <2 x i64> @llvm.mips.ld.d(i8* %ldptr, i32 0) + call void @llvm.mips.st.d(<2 x i64> %a, i8* %stptr, i32 %offset) + ret void +} + +declare <16 x i8> @llvm.mips.ld.b(i8*, i32) +declare <8 x i16> @llvm.mips.ld.h(i8*, i32) +declare <4 x i32> @llvm.mips.ld.w(i8*, i32) +declare <2 x i64> @llvm.mips.ld.d(i8*, i32) +declare void @llvm.mips.st.b(<16 x i8>, i8*, i32) +declare void @llvm.mips.st.h(<8 x i16>, i8*, i32) +declare void @llvm.mips.st.w(<4 x i32>, i8*, i32) +declare void @llvm.mips.st.d(<2 x i64>, i8*, i32) diff --git a/llvm/test/Verifier/SystemZ/intrinsic-immarg.ll b/llvm/test/Verifier/SystemZ/intrinsic-immarg.ll new file mode 100644 index 00000000000000..eaf308f7b221ad --- /dev/null +++ b/llvm/test/Verifier/SystemZ/intrinsic-immarg.ll @@ -0,0 +1,401 @@ +; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s + +declare <2 x double> @llvm.s390.vfidb(<2 x double>, i32, i32) +define void @test_vfidb(<2 x double> %arg0, i32 %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg1 + ; CHECK-NEXT: %ret0 = call <2 x double> @llvm.s390.vfidb(<2 x double> %arg0, i32 %arg1, i32 0) + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret1 = call <2 x double> @llvm.s390.vfidb(<2 x double> %arg0, i32 0, i32 %arg2) + %ret0 = call <2 x double> @llvm.s390.vfidb(<2 x double> %arg0, i32 %arg1, i32 0) + %ret1 = call <2 x double> @llvm.s390.vfidb(<2 x double> %arg0, i32 0, i32 %arg2) + ret void +} + +declare <2 x double> @llvm.s390.vfmaxdb(<2 x double>, <2 x double>, i32) +define <2 x double> @test_vfmaxdb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret = call <2 x double> @llvm.s390.vfmaxdb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) + %ret = call <2 x double> @llvm.s390.vfmaxdb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) + ret <2 x double> %ret +} + +declare <2 x double> @llvm.s390.vfmindb(<2 x double>, <2 x double>, i32) +define <2 x double> @test_vfmindb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret = call <2 x double> @llvm.s390.vfmindb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) + %ret = call <2 x double> @llvm.s390.vfmindb(<2 x double> %arg0, <2 x double> %arg1, i32 %arg2) + ret <2 x double> %ret +} + +declare <2 x float> @llvm.s390.vfmaxsb(<2 x float>, <2 x float>, i32) +define <2 x float> @test_vfmaxsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret = call <2 x float> @llvm.s390.vfmaxsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) + %ret = call <2 x float> @llvm.s390.vfmaxsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) + ret <2 x float> %ret +} + +declare <2 x float> @llvm.s390.vfminsb(<2 x float>, <2 x float>, i32) +define <2 x float> @test_vfminsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret = call <2 x float> @llvm.s390.vfminsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) + %ret = call <2 x float> @llvm.s390.vfminsb(<2 x float> %arg0, <2 x float> %arg1, i32 %arg2) + ret <2 x float> %ret +} + +declare <4 x float> @llvm.s390.vfisb(<4 x float>, i32, i32) +define <4 x float> @test_vfisb(<4 x float> %arg0, i32 %arg1, i32 %arg2) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg1 + ; CHECK-NEXT: %ret0 = call <4 x float> @llvm.s390.vfisb(<4 x float> %arg0, i32 %arg1, i32 0) + %ret0 = call <4 x float> @llvm.s390.vfisb(<4 x float> %arg0, i32 %arg1, i32 0) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg2 + ; CHECK-NEXT: %ret1 = call <4 x float> @llvm.s390.vfisb(<4 x float> %ret0, i32 0, i32 %arg2) + %ret1 = call <4 x float> @llvm.s390.vfisb(<4 x float> %ret0, i32 0, i32 %arg2) + + ret <4 x float> %ret1 +} + +declare <16 x i8> @llvm.s390.vstrcb(<16 x i8>, <16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_vstrcb(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) + %ret = call <16 x i8> @llvm.s390.vstrcb(<16 x i8> %arg0, <16 x i8>%arg1, <16 x i8> %arg2, i32 %arg3) + ret <16 x i8> %ret +} + +declare <8 x i16> @llvm.s390.vstrch(<8 x i16>, <8 x i16>, <8 x i16>, i32) +define <8 x i16> @test_vstrch(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call <8 x i16> @llvm.s390.vstrch(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) + %ret = call <8 x i16> @llvm.s390.vstrch(<8 x i16> %arg0, <8 x i16>%arg1, <8 x i16> %arg2, i32 %arg3) + ret <8 x i16> %ret +} + +declare <4 x i32> @llvm.s390.vstrcf(<4 x i32>, <4 x i32>, <4 x i32>, i32) +define <4 x i32> @test_vstrcf(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call <4 x i32> @llvm.s390.vstrcf(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) + %ret = call <4 x i32> @llvm.s390.vstrcf(<4 x i32> %arg0, <4 x i32>%arg1, <4 x i32> %arg2, i32 %arg3) + ret <4 x i32> %ret +} + +declare <16 x i8> @llvm.s390.vstrczb(<16 x i8>, <16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_vstrczb(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) + %ret = call <16 x i8> @llvm.s390.vstrczb(<16 x i8> %arg0, <16 x i8>%arg1, <16 x i8> %arg2, i32 %arg3) + ret <16 x i8> %ret +} + +declare <8 x i16> @llvm.s390.vstrczh(<8 x i16>, <8 x i16>, <8 x i16>, i32) +define <8 x i16> @test_vstrczh(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call <8 x i16> @llvm.s390.vstrczh(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) + %ret = call <8 x i16> @llvm.s390.vstrczh(<8 x i16> %arg0, <8 x i16>%arg1, <8 x i16> %arg2, i32 %arg3) + ret <8 x i16> %ret +} + +declare <4 x i32> @llvm.s390.vstrczf(<4 x i32>, <4 x i32>, <4 x i32>, i32) +define <4 x i32> @test_vstrczf(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call <4 x i32> @llvm.s390.vstrczf(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) + %ret = call <4 x i32> @llvm.s390.vstrczf(<4 x i32> %arg0, <4 x i32>%arg1, <4 x i32> %arg2, i32 %arg3) + ret <4 x i32> %ret +} + +declare { <16 x i8>, i32 } @llvm.s390.vstrcbs(<16 x i8>, <16 x i8>, <16 x i8>, i32) +define { <16 x i8>, i32 } @test_vstrcbs(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call { <16 x i8>, i32 } @llvm.s390.vstrcbs(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) + %ret = call { <16 x i8>, i32 } @llvm.s390.vstrcbs(<16 x i8> %arg0, <16 x i8>%arg1, <16 x i8> %arg2, i32 %arg3) + ret { <16 x i8>, i32 } %ret +} + +declare { <8 x i16>, i32 } @llvm.s390.vstrchs(<8 x i16>, <8 x i16>, <8 x i16>, i32) +define { <8 x i16>, i32 } @test_vstrchs(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call { <8 x i16>, i32 } @llvm.s390.vstrchs(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) + %ret = call { <8 x i16>, i32 } @llvm.s390.vstrchs(<8 x i16> %arg0, <8 x i16>%arg1, <8 x i16> %arg2, i32 %arg3) + ret { <8 x i16>, i32 } %ret +} + +declare { <4 x i32>, i32 } @llvm.s390.vstrcfs(<4 x i32>, <4 x i32>, <4 x i32>, i32) +define { <4 x i32>, i32 } @test_vstrcfs(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call { <4 x i32>, i32 } @llvm.s390.vstrcfs(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) + %ret = call { <4 x i32>, i32 } @llvm.s390.vstrcfs(<4 x i32> %arg0, <4 x i32>%arg1, <4 x i32> %arg2, i32 %arg3) + ret { <4 x i32>, i32 } %ret +} + +declare { <16 x i8>, i32 } @llvm.s390.vstrczbs(<16 x i8>, <16 x i8>, <16 x i8>, i32) +define { <16 x i8>, i32 } @test_vstrczbs(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call { <16 x i8>, i32 } @llvm.s390.vstrczbs(<16 x i8> %arg0, <16 x i8> %arg1, <16 x i8> %arg2, i32 %arg3) + %ret = call { <16 x i8>, i32 } @llvm.s390.vstrczbs(<16 x i8> %arg0, <16 x i8>%arg1, <16 x i8> %arg2, i32 %arg3) + ret { <16 x i8>, i32 } %ret +} + +declare { <8 x i16>, i32 } @llvm.s390.vstrczhs(<8 x i16>, <8 x i16>, <8 x i16>, i32) +define { <8 x i16>, i32 } @test_vstrczhs(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call { <8 x i16>, i32 } @llvm.s390.vstrczhs(<8 x i16> %arg0, <8 x i16> %arg1, <8 x i16> %arg2, i32 %arg3) + %ret = call { <8 x i16>, i32 } @llvm.s390.vstrczhs(<8 x i16> %arg0, <8 x i16>%arg1, <8 x i16> %arg2, i32 %arg3) + ret { <8 x i16>, i32 } %ret +} + +declare { <4 x i32>, i32 } @llvm.s390.vstrczfs(<4 x i32>, <4 x i32>, <4 x i32>, i32) +define { <4 x i32>, i32 } @test_vstrczfs(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %arg3 + ; CHECK-NEXT: %ret = call { <4 x i32>, i32 } @llvm.s390.vstrczfs(<4 x i32> %arg0, <4 x i32> %arg1, <4 x i32> %arg2, i32 %arg3) + %ret = call { <4 x i32>, i32 } @llvm.s390.vstrczfs(<4 x i32> %arg0, <4 x i32>%arg1, <4 x i32> %arg2, i32 %arg3) + ret { <4 x i32>, i32 } %ret +} + +declare <16 x i8> @llvm.s390.verimb(<16 x i8>, <16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 %d) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %d + ; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 %d) + %res = call <16 x i8> @llvm.s390.verimb(<16 x i8> %a, <16 x i8> %b, <16 x i8> %c, i32 %d) + ret <16 x i8> %res +} + +declare <8 x i16> @llvm.s390.verimh(<8 x i16>, <8 x i16>, <8 x i16>, i32) +define <8 x i16> @test_verimh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, i32 %d) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %d + ; CHECK-NEXT: %res = call <8 x i16> @llvm.s390.verimh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, i32 %d) + %res = call <8 x i16> @llvm.s390.verimh(<8 x i16> %a, <8 x i16> %b, <8 x i16> %c, i32 %d) + ret <8 x i16> %res +} + +declare <4 x i32> @llvm.s390.verimf(<4 x i32>, <4 x i32>, <4 x i32>, i32) +define <4 x i32> @test_verimf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, i32 %d) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %d + ; CHECK-NEXT: %res = call <4 x i32> @llvm.s390.verimf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, i32 %d) + %res = call <4 x i32> @llvm.s390.verimf(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c, i32 %d) + ret <4 x i32> %res +} + +declare <2 x i64> @llvm.s390.verimg(<2 x i64>, <2 x i64>, <2 x i64>, i32) +define <2 x i64> @test_verimg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, i32 %d) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %d + ; CHECK-NEXT: %res = call <2 x i64> @llvm.s390.verimg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, i32 %d) + %res = call <2 x i64> @llvm.s390.verimg(<2 x i64> %a, <2 x i64> %b, <2 x i64> %c, i32 %d) + ret <2 x i64> %res +} + +declare {<2 x i64>, i32} @llvm.s390.vftcidb(<2 x double>, i32) +define i32 @test_vftcidb(<2 x double> %a, i32 %b) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %b + ; CHECK-NEXT: %call = call { <2 x i64>, i32 } @llvm.s390.vftcidb(<2 x double> %a, i32 %b) + %call = call {<2 x i64>, i32} @llvm.s390.vftcidb(<2 x double> %a, i32 %b) + %res = extractvalue {<2 x i64>, i32} %call, 1 + ret i32 %res +} + +declare {<4 x i32>, i32} @llvm.s390.vftcisb(<4 x float>, i32) +define i32 @test_vftcisb(<4 x float> %a, i32 %b) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %b + ; CHECK-NEXT: %call = call { <4 x i32>, i32 } @llvm.s390.vftcisb(<4 x float> %a, i32 %b) + %call = call {<4 x i32>, i32} @llvm.s390.vftcisb(<4 x float> %a, i32 %b) + %res = extractvalue {<4 x i32>, i32} %call, 1 + ret i32 %res +} + +declare <16 x i8> @llvm.s390.vfaeb(<16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_vfaeb(<16 x i8> %a, <16 x i8> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 %c) + %res = call <16 x i8> @llvm.s390.vfaeb(<16 x i8> %a, <16 x i8> %b, i32 %c) + ret <16 x i8> %res +} + +declare <8 x i16> @llvm.s390.vfaeh(<8 x i16>, <8 x i16>, i32) +define <8 x i16> @test_vfaeh(<8 x i16> %a, <8 x i16> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <8 x i16> @llvm.s390.vfaeh(<8 x i16> %a, <8 x i16> %b, i32 %c) + %res = call <8 x i16> @llvm.s390.vfaeh(<8 x i16> %a, <8 x i16> %b, i32 %c) + ret <8 x i16> %res +} + +declare <4 x i32> @llvm.s390.vfaef(<4 x i32>, <4 x i32>, i32) +define <4 x i32> @test_vfaef(<4 x i32> %a, <4 x i32> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <4 x i32> @llvm.s390.vfaef(<4 x i32> %a, <4 x i32> %b, i32 %c) + %res = call <4 x i32> @llvm.s390.vfaef(<4 x i32> %a, <4 x i32> %b, i32 %c) + ret <4 x i32> %res +} + +declare <16 x i8> @llvm.s390.vfaezb(<16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_vfaezb(<16 x i8> %a, <16 x i8> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 %c) + %res = call <16 x i8> @llvm.s390.vfaezb(<16 x i8> %a, <16 x i8> %b, i32 %c) + ret <16 x i8> %res +} + +declare <8 x i16> @llvm.s390.vfaezh(<8 x i16>, <8 x i16>, i32) +define <8 x i16> @test_vfaezh(<8 x i16> %a, <8 x i16> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <8 x i16> @llvm.s390.vfaezh(<8 x i16> %a, <8 x i16> %b, i32 %c) + %res = call <8 x i16> @llvm.s390.vfaezh(<8 x i16> %a, <8 x i16> %b, i32 %c) + ret <8 x i16> %res +} + +declare <4 x i32> @llvm.s390.vfaezf(<4 x i32>, <4 x i32>, i32) +define <4 x i32> @test_vfaezf(<4 x i32> %a, <4 x i32> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <4 x i32> @llvm.s390.vfaezf(<4 x i32> %a, <4 x i32> %b, i32 %c) + %res = call <4 x i32> @llvm.s390.vfaezf(<4 x i32> %a, <4 x i32> %b, i32 %c) + ret <4 x i32> %res +} + +declare { <16 x i8>, i32 } @llvm.s390.vfaebs(<16 x i8>, <16 x i8>, i32) +define { <16 x i8>, i32 } @test_vfaebs(<16 x i8> %a, <16 x i8> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call { <16 x i8>, i32 } @llvm.s390.vfaebs(<16 x i8> %a, <16 x i8> %b, i32 %c) + %res = call { <16 x i8>, i32 } @llvm.s390.vfaebs(<16 x i8> %a, <16 x i8> %b, i32 %c) + ret { <16 x i8>, i32 } %res +} + +declare { <8 x i16>, i32 } @llvm.s390.vfaehs(<8 x i16>, <8 x i16>, i32) +define { <8 x i16>, i32 } @test_vfaehs(<8 x i16> %a, <8 x i16> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call { <8 x i16>, i32 } @llvm.s390.vfaehs(<8 x i16> %a, <8 x i16> %b, i32 %c) + %res = call { <8 x i16>, i32 } @llvm.s390.vfaehs(<8 x i16> %a, <8 x i16> %b, i32 %c) + ret { <8 x i16>, i32 } %res +} + +declare { <4 x i32>, i32 } @llvm.s390.vfaefs(<4 x i32>, <4 x i32>, i32) +define { <4 x i32>, i32 } @test_vfaefs(<4 x i32> %a, <4 x i32> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call { <4 x i32>, i32 } @llvm.s390.vfaefs(<4 x i32> %a, <4 x i32> %b, i32 %c) + %res = call { <4 x i32>, i32 } @llvm.s390.vfaefs(<4 x i32> %a, <4 x i32> %b, i32 %c) + ret { <4 x i32>, i32 } %res +} + +declare { <16 x i8>, i32 } @llvm.s390.vfaezbs(<16 x i8>, <16 x i8>, i32) +define { <16 x i8>, i32 } @test_vfaezbs(<16 x i8> %a, <16 x i8> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call { <16 x i8>, i32 } @llvm.s390.vfaezbs(<16 x i8> %a, <16 x i8> %b, i32 %c) + %res = call { <16 x i8>, i32 } @llvm.s390.vfaezbs(<16 x i8> %a, <16 x i8> %b, i32 %c) + ret { <16 x i8>, i32 } %res +} + +declare { <8 x i16>, i32 } @llvm.s390.vfaezhs(<8 x i16>, <8 x i16>, i32) +define { <8 x i16>, i32 } @test_vfaezhs(<8 x i16> %a, <8 x i16> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call { <8 x i16>, i32 } @llvm.s390.vfaezhs(<8 x i16> %a, <8 x i16> %b, i32 %c) + %res = call { <8 x i16>, i32 } @llvm.s390.vfaezhs(<8 x i16> %a, <8 x i16> %b, i32 %c) + ret { <8 x i16>, i32 } %res +} + +declare { <4 x i32>, i32 } @llvm.s390.vfaezfs(<4 x i32>, <4 x i32>, i32) +define { <4 x i32>, i32 } @test_vfaezfs(<4 x i32> %a, <4 x i32> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call { <4 x i32>, i32 } @llvm.s390.vfaezfs(<4 x i32> %a, <4 x i32> %b, i32 %c) + %res = call { <4 x i32>, i32 } @llvm.s390.vfaezfs(<4 x i32> %a, <4 x i32> %b, i32 %c) + ret { <4 x i32>, i32 } %res +} + +declare i32 @llvm.s390.lcbb(i8 *, i32) +define i32 @test_lcbb(i8* %a, i32 %b) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %b + ; CHECK-NEXT: %res = call i32 @llvm.s390.lcbb(i8* %a, i32 %b) + %res = call i32 @llvm.s390.lcbb(i8* %a, i32 %b) + ret i32 %res +} + +declare <16 x i8> @llvm.s390.vlbb(i8 *, i32) +define <16 x i8> @test_vlbb(i8* %a, i32 %b) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %b + ; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vlbb(i8* %a, i32 %b) + %res = call <16 x i8> @llvm.s390.vlbb(i8* %a, i32 %b) + ret <16 x i8> %res +} + +declare <2 x i64> @llvm.s390.vpdi(<2 x i64>, <2 x i64>, i32) +define <2 x i64> @test_vpdi(<2 x i64> %a, <2 x i64> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <2 x i64> @llvm.s390.vpdi(<2 x i64> %a, <2 x i64> %b, i32 %c) + %res = call <2 x i64> @llvm.s390.vpdi(<2 x i64> %a, <2 x i64> %b, i32 %c) + ret <2 x i64> %res +} + +declare <16 x i8> @llvm.s390.vmslg(<2 x i64>, <2 x i64>, <16 x i8>, i32) +define <16 x i8> @test_vmslg(<2 x i64> %a, <2 x i64> %b, <16 x i8> %c, i32 %d) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %d + ; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vmslg(<2 x i64> %a, <2 x i64> %b, <16 x i8> %c, i32 %d) + %res = call <16 x i8> @llvm.s390.vmslg(<2 x i64> %a, <2 x i64> %b, <16 x i8> %c, i32 %d) + ret <16 x i8> %res +} + +declare <16 x i8> @llvm.s390.vsldb(<16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_vsldb(<16 x i8> %a, <16 x i8> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vsldb(<16 x i8> %a, <16 x i8> %b, i32 %c) + %res = call <16 x i8> @llvm.s390.vsldb(<16 x i8> %a, <16 x i8> %b, i32 %c) + ret <16 x i8> %res +} + +declare <16 x i8> @llvm.s390.vsld(<16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_vsld(<16 x i8> %a, <16 x i8> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vsld(<16 x i8> %a, <16 x i8> %b, i32 %c) + %res = call <16 x i8> @llvm.s390.vsld(<16 x i8> %a, <16 x i8> %b, i32 %c) + ret <16 x i8> %res +} + +declare <16 x i8> @llvm.s390.vsrd(<16 x i8>, <16 x i8>, i32) +define <16 x i8> @test_vsrd(<16 x i8> %a, <16 x i8> %b, i32 %c) { + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %c + ; CHECK-NEXT: %res = call <16 x i8> @llvm.s390.vsrd(<16 x i8> %a, <16 x i8> %b, i32 %c) + %res = call <16 x i8> @llvm.s390.vsrd(<16 x i8> %a, <16 x i8> %b, i32 %c) + ret <16 x i8> %res +} + diff --git a/llvm/test/Verifier/cttz-undef-arg.ll b/llvm/test/Verifier/cttz-undef-arg.ll index b0af5ded4f3152..8c982e0924bed6 100644 --- a/llvm/test/Verifier/cttz-undef-arg.ll +++ b/llvm/test/Verifier/cttz-undef-arg.ll @@ -1,4 +1,3 @@ -; XFAIL: * ; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s declare i32 @llvm.ctlz.i32(i32, i1) @@ -6,11 +5,13 @@ declare i32 @llvm.cttz.i32(i32, i1) define void @f(i32 %x, i1 %is_not_zero) { entry: -; CHECK: is_zero_undef argument of bit counting intrinsics must be a constant int +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: i1 %is_not_zero ; CHECK-NEXT: @llvm.ctlz.i32 call i32 @llvm.ctlz.i32(i32 %x, i1 %is_not_zero) -; CHECK: is_zero_undef argument of bit counting intrinsics must be a constant int +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: i1 %is_not_zero ; CHECK-NEXT: @llvm.cttz.i32 call i32 @llvm.cttz.i32(i32 %x, i1 %is_not_zero) ret void diff --git a/llvm/test/Verifier/element-wise-atomic-memory-intrinsics.ll b/llvm/test/Verifier/element-wise-atomic-memory-intrinsics.ll index d879ca55a51e7e..f22f8eecbcc045 100644 --- a/llvm/test/Verifier/element-wise-atomic-memory-intrinsics.ll +++ b/llvm/test/Verifier/element-wise-atomic-memory-intrinsics.ll @@ -1,9 +1,11 @@ -; XFAIL: * ; RUN: not opt -verify < %s 2>&1 | FileCheck %s define void @test_memcpy(i8* %P, i8* %Q, i32 %A, i32 %E) { - ; CHECK: element size of the element-wise unordered atomic memory intrinsic must be a constant int + ; CHECK: immarg operand has non-immediate parameter + ; CHECK: i32 %E + ; CHECK-NEXT: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i32(i8* align 4 %P, i8* align 4 %Q, i32 1, i32 %E) call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i32(i8* align 4 %P, i8* align 4 %Q, i32 1, i32 %E) + ; CHECK: element size of the element-wise atomic memory intrinsic must be a power of 2 call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i32(i8* align 4 %P, i8* align 4 %Q, i32 1, i32 3) @@ -22,11 +24,15 @@ define void @test_memcpy(i8* %P, i8* %Q, i32 %A, i32 %E) { ret void } + declare void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind define void @test_memmove(i8* %P, i8* %Q, i32 %A, i32 %E) { - ; CHECK: element size of the element-wise unordered atomic memory intrinsic must be a constant int + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 %E + ; CHECK-NEXT: call void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i32(i8* align 4 %P, i8* align 4 %Q, i32 1, i32 %E) call void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i32(i8* align 4 %P, i8* align 4 %Q, i32 1, i32 %E) + ; CHECK: element size of the element-wise atomic memory intrinsic must be a power of 2 call void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i32(i8* align 4 %P, i8* align 4 %Q, i32 1, i32 3) @@ -45,11 +51,15 @@ define void @test_memmove(i8* %P, i8* %Q, i32 %A, i32 %E) { ret void } + declare void @llvm.memmove.element.unordered.atomic.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32) nounwind define void @test_memset(i8* %P, i8 %V, i32 %A, i32 %E) { - ; CHECK: element size of the element-wise unordered atomic memory intrinsic must be a constant int + ; CHECK: immarg operand has non-immediate parameter + ; CHECK: i32 %E + ; CHECK: call void @llvm.memset.element.unordered.atomic.p0i8.i32(i8* align 4 %P, i8 %V, i32 1, i32 %E) call void @llvm.memset.element.unordered.atomic.p0i8.i32(i8* align 4 %P, i8 %V, i32 1, i32 %E) + ; CHECK: element size of the element-wise atomic memory intrinsic must be a power of 2 call void @llvm.memset.element.unordered.atomic.p0i8.i32(i8* align 4 %P, i8 %V, i32 1, i32 3) diff --git a/llvm/test/Verifier/frameescape.ll b/llvm/test/Verifier/frameescape.ll index 951b64d21612e6..0850b9495d9bbb 100644 --- a/llvm/test/Verifier/frameescape.ll +++ b/llvm/test/Verifier/frameescape.ll @@ -1,4 +1,3 @@ -; XFAIL: * ; RUN: not llvm-as %s -o /dev/null 2>&1 | FileCheck %s declare void @llvm.localescape(...) @@ -48,7 +47,10 @@ define internal void @k(i32 %n) { call i8* @llvm.localrecover(i8* bitcast(void()* @f to i8*), i8* null, i32 %n) ret void } -; CHECK: idx argument of llvm.localrecover must be a constant int + +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: i32 %n +; CHECK-NEXT: %1 = call i8* @llvm.localrecover(i8* bitcast (void ()* @f to i8*), i8* null, i32 %n) define internal void @l(i8* %b) { %a = alloca i8 diff --git a/llvm/test/Verifier/immarg-param-attribute-invalid.ll b/llvm/test/Verifier/immarg-param-attribute-invalid.ll new file mode 100644 index 00000000000000..5b923c5be52a2c --- /dev/null +++ b/llvm/test/Verifier/immarg-param-attribute-invalid.ll @@ -0,0 +1,107 @@ +; RUN: not llvm-as < %s -o /dev/null 2>&1 | FileCheck %s + +declare void @llvm.test.immarg.intrinsic.i32(i32 immarg) +declare void @llvm.test.immarg.intrinsic.v2i32(<2 x i32> immarg) +declare void @llvm.test.immarg.intrinsic.f32(float immarg) +declare void @llvm.test.immarg.intrinsic.v2f32(<2 x float> immarg) +declare void @llvm.test.immarg.intrinsic.2ai32([2 x i32] immarg) + +@gv = global i32 undef, align 4 + +define void @call_llvm.test.immarg.intrinsic.i32(i32 %arg) { +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: i32 undef +; CHECK-NEXT: call void @llvm.test.immarg.intrinsic.i32(i32 undef) + call void @llvm.test.immarg.intrinsic.i32(i32 undef) + +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: i32 %arg +; CHECK-NEXT: call void @llvm.test.immarg.intrinsic.i32(i32 %arg) + call void @llvm.test.immarg.intrinsic.i32(i32 %arg) + + ; CHECK: immarg operand has non-immediate parameter + ; CHECK-NEXT: i32 ptrtoint (i32* @gv to i32) + ; CHECK-NEXT: call void @llvm.test.immarg.intrinsic.i32(i32 ptrtoint (i32* @gv to i32)) + call void @llvm.test.immarg.intrinsic.i32(i32 ptrtoint (i32* @gv to i32)) + ret void +} + +define void @call_llvm.test.immarg.intrinsic.f32() { +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: float undef +; CHECK-NEXT: call void @llvm.test.immarg.intrinsic.f32(float undef) + call void @llvm.test.immarg.intrinsic.f32(float undef) + ret void +} + +define void @call_llvm.test.immarg.intrinsic.v2i32() { +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: <2 x i32> zeroinitializer +; CHECK-NEXT: call void @llvm.test.immarg.intrinsic.v2i32(<2 x i32> zeroinitializer) + call void @llvm.test.immarg.intrinsic.v2i32(<2 x i32> zeroinitializer) + +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: <2 x i32> +; CHECK-NEXT: call void @llvm.test.immarg.intrinsic.v2i32(<2 x i32> ) + call void @llvm.test.immarg.intrinsic.v2i32(<2 x i32> ) + +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: <2 x i32> undef +; CHECK-NEXT: call void @llvm.test.immarg.intrinsic.v2i32(<2 x i32> undef) + call void @llvm.test.immarg.intrinsic.v2i32(<2 x i32> undef) + ret void +} + +define void @call_llvm.test.immarg.intrinsic.v2f32() { +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: <2 x float> zeroinitializer +; CHECK-NEXT: call void @llvm.test.immarg.intrinsic.v2f32(<2 x float> zeroinitializer) + call void @llvm.test.immarg.intrinsic.v2f32(<2 x float> zeroinitializer) + +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: <2 x float> +; CHECK-NEXT: call void @llvm.test.immarg.intrinsic.v2f32(<2 x float> ) + call void @llvm.test.immarg.intrinsic.v2f32(<2 x float> ) + ret void +} + +define void @call_llvm.test.immarg.intrinsic.2ai32() { +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: [2 x i32] zeroinitializer +; CHECK-NEXT: call void @llvm.test.immarg.intrinsic.2ai32([2 x i32] zeroinitializer) + call void @llvm.test.immarg.intrinsic.2ai32([2 x i32] zeroinitializer) + +; CHECK: immarg operand has non-immediate parameter +; CHECK-NEXT: [2 x i32] [i32 1, i32 2] +; CHECK-NEXT: call void @llvm.test.immarg.intrinsic.2ai32([2 x i32] [i32 1, i32 2]) + call void @llvm.test.immarg.intrinsic.2ai32([2 x i32] [i32 1, i32 2]) + ret void +} + +; CHECK: immarg attribute only applies to intrinsics +; CHECK-NEXT: void (i32)* @not_an_intrinsic +declare void @not_an_intrinsic(i32 immarg) + +declare void @llvm.test.intrinsic(i32) +declare void @func(i32) + +define void @only_on_callsite() { +; CHECK: immarg attribute only applies to intrinsics +; CHECK-NEXT: call void @func(i32 immarg 0) +; CHECK-NEXT: immarg may not apply only to call sites +; CHECK-NEXT: i32 0 +; CHECK-NEXT: call void @func(i32 immarg 0) + call void @func(i32 immarg 0) + +; CHECK: immarg may not apply only to call sites +; CHECK-NEXT: i32 0 +; CHECK-NEXT: call void @llvm.test.intrinsic(i32 immarg 0) + call void @llvm.test.intrinsic(i32 immarg 0) + ret void +} + +; CHECK: immarg attribute only applies to intrinsics +; CHECK: void (i32)* @on_function_definition +define void @on_function_definition(i32 immarg %arg) { + ret void +} diff --git a/llvm/test/Verifier/intrinsic-immarg.ll b/llvm/test/Verifier/intrinsic-immarg.ll index 68297678c0b619..915432a93bb876 100644 --- a/llvm/test/Verifier/intrinsic-immarg.ll +++ b/llvm/test/Verifier/intrinsic-immarg.ll @@ -27,23 +27,6 @@ define void @memcpy(i8* %dest, i8* %src, i1 %is.volatile) { ret void } -declare void @llvm.memcpy.inline.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) -define void @memcpy_inline_is_volatile(i8* %dest, i8* %src, i1 %is.volatile) { - ; CHECK: immarg operand has non-immediate parameter - ; CHECK-NEXT: i1 %is.volatile - ; CHECK-NEXT: call void @llvm.memcpy.inline.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 8, i1 %is.volatile) - call void @llvm.memcpy.inline.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 8, i1 %is.volatile) - ret void -} - -define void @memcpy_inline_variable_size(i8* %dest, i8* %src, i32 %size) { - ; CHECK: immarg operand has non-immediate parameter - ; CHECK-NEXT: i32 %size - ; CHECK-NEXT: call void @llvm.memcpy.inline.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %size, i1 true) - call void @llvm.memcpy.inline.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 %size, i1 true) - ret void -} - declare void @llvm.memmove.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i1) define void @memmove(i8* %dest, i8* %src, i1 %is.volatile) { ; CHECK: immarg operand has non-immediate parameter